UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 883

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
transfer is complete. After that, the master device generates the stop condition or restart condition. This causes exit from
communications.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
For reception, the required number of data is received and ACK is not returned for the next data immediately after
Remark
n = 0 to 2, m = 0, 1
No
No
No
Clear communication mode flag
Communication direction
Communication direction
Communication mode
Communication mode
ACKEn = WTIMn = 1
SPIEn = 0, IICEn = 1
OCKSm ← XXH
Clear ready flag
Ready flag = 1?
IICCLn ← XXH
SVAn ← XXH
IICCn ← XXH
IICXn ← 0XH
IICFn ← 0XH
Set IICRSVn
ACKDn = 1?
WRELn = 1
Write IICn
Set ports
flag = 1?
flag = 1?
flag = 1?
flag = 1?
START
Figure 19-21. Slave Operation Flowchart (1)
Yes
Yes
Yes
Yes
Yes
No
No
No
Yes
Transmission
start
Refer to Table 4-20 Settings When Port Pins Are Used for
Alternate Functions to set the I
Transfer clock selection
Local address setting
Start condition setting
No
2
Communication direction
C mode before this function is used.
Communication mode
Clear ready flag
Ready flag = 1?
WRELn = 1
Read IICn
flag = 0?
flag = 1?
Yes
Yes
Yes
CHAPTER 19 I
No
No
Reception
start
Page 883 of 1509
2
C BUS