UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 629

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(2) Tuning operation clearing procedure
(3) When not tuning TAA4
(4) Basic operation of TAA4 during tuning operation
(e) Set the TAA4CE bit to 1 and set the TAB1CE bit to 1 immediately after that to start the 6-phase PWM
To clear the tuning operation and exit the 6-phase PWM output mode, set the TAA4 and TAB1 registers using the
following procedure.
<1> Clear the TAB1CTL0.TAB1CE bit to 0 and stop the timer operation.
<2> Clear the TAA4CTL0.TAA4CE bit to 0 so that TAA4 can be separated.
<3> Stop the timer output by using the TAB1IOC0 register.
<4> Clear the TAA4CTL1.TAA4SYE bit to 0 to clear the tuning operation.
Caution Manipulating (reading/writing) the other TAB1, TAA4, and TMQ option registers is prohibited until
When the match interrupt signal of TAA4 is not necessary as the conversion trigger source that starts the A/D
converter, TAA4 can be used independently as a separate timer without being tuned. In this case, the match
interrupt signal of TAA4 cannot be used as a trigger source to start A/D conversion in the 6-phase PWM output
mode. Therefore, fix the TAB1OPT2.TAB1AT0 to TAB1OPT2.TAB1AT3 bits to 0.
The other control bits can be used in the same manner as when TAA4 is tuned.
If TAA4 is not tuned, the compare registers (TAA4CCR0 and TAA4CCR1) of TAA4 are not affected by the setting of
the TAB1OPT0.TAB1CMS and TAB1OPT2.TAB1RDE bit. For the initialization procedure when TAA4 is not tuned,
see (b) to (e) in 11.4.5 (1) Tuning operation starting procedure. (a) is not necessary because it is a step used to
set TAA4 for the tuning operation.
The 16-bit counter of TAA4 only counts up. The 16-bit counter is cleared by the set cycle value of the TAB1CCR0
register and starts counting from 0000H again. The count value of this counter is the same as the value of the 16-
bit counter of TAB1 when it counts up. However, it is not the same when the 16-bit counter of TAA4 counts down.
• When TAB1 counts up (same value)
• When TAB1 counts down (not same value)
16-bit counter of TAB1: 0000H → M (counting up)
16-bit counter of TAA4: 0000H → M (counting up)
16-bit counter of TAB1: M + 1 → 0001H (counting down)
16-bit counter of TAA4: 0000H → M (counting up)
output operation
Rewriting the TAB1CTL0, TAB1CTL1, TAB1IOC1, TAB1IOC2, TAA4CTL0, and TAA4CTL1 registers is prohibited
during operation. The operation and the PWM output waveform are not guaranteed if any of these registers is
rewritten during operation. However, rewriting the TAB1CTL0.TAB1CE bit to clear it is permitted. Manipulating
(reading/writing) the other TAB1, TAA4, and TMQ option registers is prohibited until the TAA4CTL0.TAA4CE bit
is set to 1 and then the TAB1CE bit is set to 1.
the TAB1CE bit is set to 1 and then the TAA4CE bit is set to 1.
CHAPTER 11 MOTOR CONTROL FUNCTION
Page 629 of 1509