UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 952

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(b) Write
Remark The OPMODE0 to OPMODE2 bits are read-only in the CAN sleep mode or CAN stop mode.
Cautions 1. Transition to and from the CAN stop mode must be made via CAN sleep mode. A request
Caution It may take time to change the mode to the initialization mode or power save mode. Therefore,
Other than above CCERC bit is not changed.
PSMODE1
OPMODE2
Clear VALID
Set CCERC
Set AL
0
0
1
1
0
0
0
0
1
1
1
0
1
0
1
Other than above
2. After releasing the power save mode, the C0GMCTRL.MBON flag must be checked before
3. A request for transition to the CAN sleep mode is held pending until it is canceled by
be sure to check if the mode has been successfully changed, by reading the register value
before executing the processing.
Other than above
PSMODE0
for direct transition to and from the CAN stop mode is ignored.
accessing the message buffer again.
software or until the CAN bus enters the bus idle state. The software can check transition
to the CAN sleep mode by reading the PSMODE0 and PSMODE1 bits.
OPMODE1
0
1
0
1
CCERC bit is set to 1.
VALID bit is not changed.
VALID bit is cleared to 0.
0
0
1
1
0
0
Clear AL
1
0
No power save mode is selected.
CAN sleep mode
Setting prohibited
CAN stop mode
OPMODE0
0
1
0
1
0
1
AL bit is cleared to 0.
AL bit is set to 1.
AL bit is not changed.
No operation mode is selected (CAN module is in the initialization mode).
Normal operation mode
Normal operation mode with automatic block transmission function
(normal operation mode with ABT)
Receive-only mode
Single-shot mode
Self-test mode
Setting prohibited
Setting of CCERC bit
Setting of VALID bit
Power save mode
Setting of AL bit
Operation mode
CHAPTER 20 CAN CONTROLLER
Page 952 of 1509
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