78M6612-IMR/F Maxim Integrated Products, 78M6612-IMR/F Datasheet - Page 25

• Manufacturer Part Number: 78M6612-IMR/F
• Description: IC POWER MEASUREMENT AC 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 78M6612-IMR/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS_6612_001
using the control bits TB80 (S0CON[3]) and TB81 (S1CON[3]) in the S0CON and S1CON SFRs for transmit
Serial Interface 0 Control Register (S0CON)
Rev. 1.2
and RB81 (S1CON[2]) for receive operations. SM20 (S0CON[5]) and SM21 (S1CON[5]) can be used as
handshake signals for inter-processor communication in multi-processor systems.
The function of the UART0 depends on the setting of the Serial Port Control Register S0CON
S0CON[7]
S0CON[6]
S0CON[5]
S0CON[4]
S0CON[3]
S0CON[2]
S0CON[1]
S0CON[0]
Bit
Parity of serial data is available through the P flag of the accumulator. Seven-bit serial modes
with parity, such as those used by the FLAG protocol, can be simulated by setting and reading bit
7 of 8-bit output data. Seven-bit serial modes without parity can be simulated by setting bit 7 to a
constant 1. 8-bit serial modes with parity can be simulated by setting and reading the 9
MSB
SM0
Symbol
REN0
SM20
TB80
RB80
SM0
SM1
TI0
RI0
SM1
Function
These two bits set the UART0 mode:
Enables the inter-processor communication feature.
If set, enables serial reception. Cleared by software to disable reception.
The 9
depending on the function it performs (parity check, multiprocessor
communication etc.).
In modes 2 and 3, it is the 9
RB80
software.
Transmit interrupt flag, set by hardware after completion of a serial transfer.
Must be cleared by software.
Receive interrupt flag, set by hardware after completion of a serial reception.
Must be cleared by software.
Mode
SM20
th
is the stop bit. In mode 0 this bit is not used. Must be cleared by
0
1
2
3
Table 13: The
transmitted data bit in Modes 2 and 3. Set or cleared by the MPU,
REN0
Description
8-bit UART
9-bit UART
9-bit UART
N/A
S0CON
TB80
th
data bit received. In Mode 1, if SM20 is 0,
Register
SM0
RB80
0
0
1
1
TI0
SM1
0
1
0
1
RI0
78M6612 Data Sheet
LSB
.
th
bit,
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