78M6612-IMR/F Maxim Integrated Products, 78M6612-IMR/F Datasheet - Page 84

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78M6612-IMR/F

Manufacturer Part Number
78M6612-IMR/F
Description
IC POWER MEASUREMENT AC 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of 78M6612-IMR/F

Mounting Style
SMD/SMT
Package / Case
QFN-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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78M6612 Data Sheet
must be 12 (allowing for one settling cycle). The required configuration is FIR_LEN = 1 (three cycles per
conversion) and MUX_DIV[1:0] = 01 (4 conversions per mux frame).
During operation, the MPU is in charge of controlling the multiplexer cycles, for example by inserting an
alternate multiplexer sequence at regular intervals using MUX_ALT. This enables temperature
measurement. The polarity of chopping circuitry must be altered for each sample. It must also alternate
for each alternate multiplexer reading. This is accomplished by maintaining CHOP_E = 00.
4.4.5 CE Calculations
The CE performs the precision computations necessary to accurately measure energy. These
computations include offset cancellation, products, product smoothing, product summation, frequency
detection, VAR calculation, sag detection, peak detection, and voltage phase measurement. Refer to the
applicable 78M6612 Firmware Description Document.
4.4.6 CE Status
Since the CE_BUSY interrupt occurs at 2520.6 Hz, it is desirable to minimize the computation required
in the interrupt handler of the MPU. The MPU can read the CE status word at every CE_BUSY interrupt.
The CE Status Word is used for generating early warnings to the MPU. It contains sag warnings for VA
as well as F0, the derived clock operating at the fundamental input frequency. CESTATUS provides
information about the status of voltage and input AC signal frequency, which are useful for generating
early power fail warnings, e.g. to initiate necessary data storage. CESTATUS represents the status flags
for the preceding CE code pass (CE busy interrupt). Sag alarms are not remembered from one code
pass to the next. The CE Status word is refreshed at every CE_BUSY interrupt.
The significance of the bits in CESTATUS is shown in the table below:
84
CESTATUS
Address
0x70
31-29
24-0
[bit]
CE
28
27
26
25
Name
Not Used
Reserved
Not Used
CESTATUS
SAG_B
SAG_A
Name
F0
Description
These unused bits will always be zero.
F0 is a square wave at the exact fundamental input frequency.
Normally zero. Becomes one when VB remains below SAG_THR for
SAG_CNT samples. Will not return to zero until VB rises above SAG_THR.
Normally zero. Becomes one when VA remains below SAG_THR for
SAG_CNT samples. Will not return to zero until VA rises above SAG_THR.
These unused bits will always be zero.
Description
See description of CE status word below.
DS_6612_001
Rev. 1.2

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