78M6612-IMR/F Maxim Integrated Products, 78M6612-IMR/F Datasheet - Page 34

• Manufacturer Part Number: 78M6612-IMR/F
• Description: IC POWER MEASUREMENT AC 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 78M6612-IMR/F

• Mounting Style: SMD/SMT
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

78M6612 Data Sheet
Interrupt Request Register (IRCON
1.4.9.2 External Interrupts
direction of interrupts 2 and 3 is programmable in the MPU. Interrupts 2 and 3 should be programmed
for falling sensitivity. The generic 8051 MPU literature states that interrupt 4 through 6 are defined as
rising edge sensitive. Thus, the hardware signals attached to interrupts 5 and 6 are inverted to achieve
the edge polarity shown in
FWCOLx interrupts occur when the CE collides with a Flash write attempt. See the Flash write
description in
SFR (special function register) enable bits must be set to permit any of these interrupts to occur.
Likewise, each interrupt has its own flag bit, which is set by the interrupt hardware, and reset by the MPU
interrupt handler. Note that XFER_BUSY, RTC_1SEC, FWCOL0, FWCOL1, PLLRISE, PLLFALL, have
their own enable and flag bits in addition to the interrupt 6, 4, and 2 enable and flag bits.
34
The 78M6612 MPU allows seven external interrupts. These are connected as shown in
IRCON[7]
IRCON[6]
IRCON[5]
IRCON[4]
IRCON[3]
IRCON[2]
IRCON[1]
IRCON[0]
Bit
Only TF0 and TF1 (timer 0 and timer 1 overflow flag) will be automatically cleared by hardware
when the service routine is called (Signals T0ACK and T1ACK – port ISR – active high when
the service routine is called).
MSB
Interrupt
Section 1.5.5
Symbol Function
External
IEX6
IEX5
IEX4
IEX3
IEX2
–
–
–
–
0
1
2
3
4
5
6
External interrupt 6 edge flag.
External interrupt 5 edge flag.
External interrupt 4 edge flag.
External interrupt 3 edge flag.
External interrupt 2 edge flag.
PLL_OK (rising), PLL_OK (falling)
–
Table
for more detail.
XFER_BUSY OR RTC_1SEC
Digital I/O High Priority
Digital I/O Low Priority
30.
FWCOL0, FWCOL1
Table 30: External MPU Interrupts
EX6
EEPROM busy
Table 29: The
)
Connection
CE_BUSY
IEX5
IRCON
IEX4
Register
see DIO_Rx
see DIO_Rx
Polarity
IEX3
falling
falling
falling
falling
rising
IEX2
Flag
Reset
automatic
automatic
automatic
automatic
automatic
automatic
manual
Table
–
LSB
DS_6612_001
30. The
Rev. 1.2