TRC103 RFM, TRC103 Datasheet - Page 15

• Manufacturer Part Number: TRC103
• Description: RFIC TRANSCEIVER MULTI-CHANNEL F
• Manufacturer: RFM
• Series: TRCr

Specifications of TRC103

• Frequency: 863MHz ~ 960MHz
• Data Rate - Maximum: 100kbps
• Modulation Or Protocol: FSK, OOK
• Applications: General Purpose
• Power - Output: 11dBm
• Sensitivity: -112dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 4mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Other names: 583-1095-2

The RSSI block can be used in interrupt mode by setting the bit IRQCFG0E_RSSI_Int[3] to 1. When RXCFG14 _
RSSI[7..0] is equal or greater than a predefined value stored in IRQCFG0F_RSSI_thld [7..0], the bit IRQCFG0E_
SIG_DETECT[2] goes high and an interrupt signal RSSI_IRQ is generated on pin IRQ0 if IRQCFG0D_RX_
IRQ0[7..6] is set to 01 (see Table 8). The interrupt is cleared by writing a 1 to bit IRQCFG0E_ SIG_DETECT[2]. If
the bit RSSI_IRQ remains high, the process starts again. Figure 10 shows the timing diagram of RSSI in interrupt
mode.
3.5 Receiving in Buffered Data Mode
The receiver works in buffered mode when the MCFG01_Mode[5] bit is set to 1. In this mode, the output of the
data and clock recovery, i.e., the demodulated and resynchronized signal and the clock signal DCLK are not sent
directly to the output pins DATA and IRQ1 (DCLK). These signals are used to store the demodulated data in
blocks of 8 bits in a 64-byte FIFO. Figure 11 shows the receiver chain in this mode. The FSK and OOK demodula-
tors, data and clock recovery circuit and start pattern detect block work as described for Continuous data mode,
but they are used with two additional blocks, the FIFO and SPI.
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Figure 10
Figure 11
TRC103 - 12/15/10
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