TRC103 RFM, TRC103 Datasheet - Page 25

• Manufacturer Part Number: TRC103
• Description: RFIC TRANSCEIVER MULTI-CHANNEL F
• Manufacturer: RFM
• Series: TRCr

Specifications of TRC103

• Frequency: 863MHz ~ 960MHz
• Data Rate - Maximum: 100kbps
• Modulation Or Protocol: FSK, OOK
• Applications: General Purpose
• Power - Output: 11dBm
• Sensitivity: -112dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 4mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Other names: 583-1095-2

The TRC103 packet handler provides a mechanism for scrambling the packet payload. A 9-bit LFSR is used to
generate a random sequence. The payload and the 16-bit CRC checksum are XOR’d with this random sequence
as shown in Figure 18. The data is descrambled on the receiver side by XORing with the same random se-
quence. The scrambling/descrambling process is enabled by setting the PKTCFG1E_Scrmb_En[4] bit to 1.
3.10 SPI Configuration Interface
The TRC103 contains two SPI-compatible interfaces, one to read and write the configuration registers, the other
to read and write FIFO data. Both interfaces are configured in slave mode and share the same pins: SDO (SPI
Slave Data Out), SDI (SPI Slave Data In), and SCK (Serial Clock). Two pins are provided to select the SPI con-
nection. The nSS_CONFIG pin allows access to the configuration registers and the nSS_DATA pin allows access
to the FIFO. Figure 19 shows a typical connection between a host microcontroller and the SPI interface.
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Figure 18
Figure 19
TRC103 - 12/15/10
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