ATA8742-PXQW Atmel, ATA8742-PXQW Datasheet - Page 166

• Manufacturer Part Number: ATA8742-PXQW
• Description: MCU W/TRANSMITTER ASK/FSK 24QFN
• Manufacturer: Atmel

Specifications of ATA8742-PXQW

• Frequency: 433MHz
• Applications: Home Automation, Remote Sensing, RKE
• Modulation Or Protocol: ASK, FSK
• Data Rate - Maximum: 32 kBit/s
• Power - Output: 7.5dBm
• Current - Transmitting: 9.8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 4kB Flash, 256B EEPROM, 256B SRAM
• Voltage - Supply: 2 V ~ 4 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Processor Series: ATA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 8.1 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ATASTK512-EK1-IND
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

25.10 Register Description
25.10.1
166
ATA8742
ADMUX – ADC Multiplexer Selection Register
• Bit 7:6 – REFS1:REFS0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in
these bits are changed during a conversion, the change will not go in effect until this conversion
is complete (ADIF in ADCSR is set).
Special care should be taken when changing differential channels. Once a differential channel
has been selected, the stage may take as much as 25 ADC clock cycles to stabilize to the new
value. Thus conversions should not be started within the first 13 clock cycles after selecting a
new differential channel. Alternatively, conversion results obtained within this period should be
discarded.
The same settling time should be observed for the first differential conversion after changing
ADC reference (by changing the REFS1:0 bits in ADMUX).
If channels where differential gain is used ie. the gainstage, using V
AREF higher than (V
allowed to connect internal voltage reference to AREF pin, if an external voltage is being applied
to it already. Internal voltage reference is connected AREF pin when REFS1:0 is set to value
‘11’.
Table 25-3.
• Bits 5:0 – MUX5:0: Analog Channel and Gain Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC. In
case of differential input, gain selection is also made with these bits. Selections on
page 167
the offset calibration selections are located. Selecting the single-ended channel ADC8 enables
the temperature measurement. See
changed during a conversion, the change will not go into effect until this conversion is complete
(ADIF in ADCSRA is set).
Bit
0x07 (0x27)
Read/Write
Initial Value
REFS1
0
0
1
1
show values for single ended channels and where the differential channels as well as
Voltage Reference Selections for ADC
REFS0
REFS1
R/W
7
0
0
1
0
1
CC
REFS0
- 1V) is not recommended, as this will affect ADC accuracy. It is not
R/W
Voltage Reference Selection
V
External Voltage Reference at PA0 (AREF) pin, Internal Voltage Reference
turned off.
Internal 1.1V Voltage Reference.
Reserved.
6
0
CC
used as analog reference, disconnected from PA0 (AREF).
MUX5
R/W
5
0
Table 25-4 on page 167
MUX4
R/W
4
0
MUX3
R/W
3
0
MUX2
R/W
2
0
for details. If these bits are
Table 25-3 on page
MUX1
CC
R/W
1
0
or an optional external
MUX0
R/W
9151A–INDCO–07/09
0
0
Table 25-4 on
ADMUX
166. If