ATA8742-PXQW Atmel, ATA8742-PXQW Datasheet - Page 37
ATA8742-PXQW
Manufacturer Part Number
ATA8742-PXQW
Description
MCU W/TRANSMITTER ASK/FSK 24QFN
Manufacturer
Atmel
Datasheet
1.ATA8742-PXQW.pdf
(238 pages)
Specifications of ATA8742-PXQW
Frequency
433MHz
Applications
Home Automation, Remote Sensing, RKE
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
32 kBit/s
Power - Output
7.5dBm
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Voltage - Supply
2 V ~ 4 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA8x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
8.1 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
ATA8742-PXQW
Manufacturer:
ATMEL
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13.4
13.4.1
9151A–INDCO–07/09
I/O Memory
General Purpose I/O Registers
The I/O space definition of the ATtiny24/44/84 is shown in
All ATtiny24/44/84 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. See the instruction
set section for more details. When using the I/O specific commands IN and OUT, the I/O
addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD
and ST instructions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
The ATtiny24/44/84 contains three General Purpose I/O Registers. These registers can be used
for storing any information, and they are particularly useful for storing global variables and status
flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
“Register Summary” on page
ATA8742
228.
37
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