NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 42

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

42
Note: Not all features are available on all ICH8 components. See
more details.
Power Management Logic
External Glue Integration
SMBus
High Precision Event Timers
Timers Based on 82C54
Real-Time Clock
— Supports ACPI 3.0
— ACPI-defined power states (C1, S1,
— ACPI Power Management Timer
— (Mobile Only) Support for “Intel
— PCI CLKRUN# (Mobile only) and
— SMI# generation
— All registers readable/restorable for
— Integrated Pull-up, Pull-down and
— Integrated Pull-down and Series
— NEW: faster speed, up to 100 kbps
— Flexible SMBus/SMLINK
— Provides independent
— Supports SMBus 2.0 Specification
— Host interface allows processor to
— Slave interface allows an internal or
— Compatible with most two-wire
— Advanced operating system
— System timer, Refresh request,
— 256-byte battery-backed CMOS
— Integrated oscillator components
— Lower Power DC/DC Converter
S3–S5 for Desktop and C1–C4, S1,
S3–S5 for Mobile)
SpeedStep
power control and “Deeper Sleep”
power state
PME# support
proper resume from 0 V suspend
states
Series Termination resistors on IDE
(Mobile only), processor interface
resistors on USB
architecture to optimize for ASF
manageability bus through SMLink
interface
communicate via SMBus
external Microcontroller to access
system resources
components that are also I
compatible
interrupt scheduling
Speaker tone output
RAM
implementation
®
Technology” processor
2
C
System TCO Reduction Circuits
Enhanced DMA Controller
Interrupt Controller
1.05 V operation with 1.5 V and 3.3 V
I/O
1.05 V Core Voltage
NEW: Five Integrated Voltage
Regulators for different power rails
Firmware Hub I/F supports BIOS
Memory size up to 8 MB
Serial Peripheral Interface (SPI)
Low Pin Count (LPC) I/F
GPIO
Package
— Timers to generate SMI# and Reset
— Timers to detect improper
— Integrated processor frequency
— Supports ability to disable external
— Two cascaded 8237 DMA controllers
— Supports LPC DMA
— Supports up to eight PCI interrupt
— Supports PCI 2.3 Message Signaled
— Two cascaded 82C59 with 15
— Integrated I/O APIC capability with
— Supports Processor System Bus
— 5 V tolerant buffers on IDE (Mobile
— NEW: supports up to two SPI
— NEW: supports 20 MHz and 33 MHz
— Supports two Master/DMA devices.
— Support for Security Device
— TTL, Open-Drain, Inversion
— 31x31 mm 652 mBGA (Desktop
— 31x31 mm 676 mBGA (Mobile
upon detection of system hang
processor reset
strap logic
devices
pins
Interrupts
interrupts
24 interrupts
interrupt delivery
only), PCI, USB, and selected
Legacy signals
devices
SPI devices
(Trusted Platform Module)
connected to LPC.
Only)
Only)
Intel
Section 1.2
®
ICH8 Family Datasheet
for