A3PE-BRD600-SKT Actel, A3PE-BRD600-SKT Datasheet - Page 33
A3PE-BRD600-SKT
Manufacturer Part Number
A3PE-BRD600-SKT
Description
MCU, MPU & DSP Development Tools ProASIC3/E Starter Kit
Manufacturer
Actel
Datasheet
1.A3PE-BRD600-SKT.pdf
(106 pages)
Specifications of A3PE-BRD600-SKT
Processor To Be Evaluated
ProASIC3/E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 33 of 106
- Download datasheet (8Mb)
Design Implementation
Programming
System Verification
ProASIC3/E Starter Kit User’s Guide and Tutorial
During design implementation, Actel Designer places-and-routes the design.
Place-and-Route
Start Designer from Libero IDE to place-and-route the design.
Timing Simulation
Perform timing simulation on the design after place-and-route in Designer. Timing simulation requires information
extracted and back-annotated from Designer.
Optional Tools
The tools listed in
perform static timing analysis, power analysis, customize I/O placements and attributes, and view the netlist. After
place-and-route, perform the post-layout (timing) simulation.
For more information on the tools described in the above section, refer to the Designer User’s Guide.
Program the device with programming software and hardware from Actel or a supported third party programming
system. Refer to the Designer User’s Guide, Silicon Sculptor User’s Guide, and FlashPro User’s Guide for information
about programming an Actel device. These guides can be found at
default.aspx.
Use the Logic Navigator tool to perform system verification on a programmed device.
Table 6-1
Timer
SmartPower
ChipEdit
PinEdit
Netlist Viewer
provide optional functions that are not required in a basic design. Use these tools to
Designer User Tools
Table 6-1 · Designer User Tools
Static timing analysis
Power analysis
Customize I/O and logic macro
placements
Customize I/O placements and
attributes
View your netlist and trace paths
User Tool Function
http://www.actel.com/techdocs/manuals/
Design Implementation
33
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