A3PE-BRD600-SKT Actel, A3PE-BRD600-SKT Datasheet - Page 41
A3PE-BRD600-SKT
Manufacturer Part Number
A3PE-BRD600-SKT
Description
MCU, MPU & DSP Development Tools ProASIC3/E Starter Kit
Manufacturer
Actel
Datasheet
1.A3PE-BRD600-SKT.pdf
(106 pages)
Specifications of A3PE-BRD600-SKT
Processor To Be Evaluated
ProASIC3/E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 41 of 106
- Download datasheet (8Mb)
Step 2 – Perform Pre-Synthesis Simulation
Create Stimulus Using WaveFormer Lite
ProASIC3/E Starter Kit User’s Guide and Tutorial
4.
The next step is simulating the RTL description of the design. First, use WaveFormer Lite to create a stimulus for the
design and then generate a testbench for the design.
WaveFormer Lite generates VHDL testbenches from drawn waveforms. There are three basic steps for creating
testbenches using WaveFormer Lite and the Actel Libero IDE software:
1.
Check the HDL in the file before you continue. In the Design Hierarchy or File Manager tab
click count8.vhd and select Check HDL file. This checks the syntax of the count8.vhd file. Before moving to the
next section, modify the code if you find any errors.
The rest of the source code is in the /src folder. Right-click Top.vhd in the design hierarchy and select Set As Root
so that Top.vhd is represented as the top
menu, using File > Import Files
Import Signal Information
Figure 7-10. Design Hierarchy and File Manager Tabs
(Figure
Figure 7-11. Import Source Files
-
7-11).
level file for the project. You can import all the files from the Libero IDE
Step 2 – Perform Pre-Synthesis Simulation
(Figure
7-10), right-
41
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