A3PE-BRD600-SKT Actel, A3PE-BRD600-SKT Datasheet - Page 46
A3PE-BRD600-SKT
Manufacturer Part Number
A3PE-BRD600-SKT
Description
MCU, MPU & DSP Development Tools ProASIC3/E Starter Kit
Manufacturer
Actel
Datasheet
1.A3PE-BRD600-SKT.pdf
(106 pages)
Specifications of A3PE-BRD600-SKT
Processor To Be Evaluated
ProASIC3/E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Quick Start Tutorial
46
4.
5.
6.
7.
8.
9.
10. Exit WaveFormer Lite (File > Exit). The File Manager displays the stimulus files. The design is ready to simulate
Alternatively, you can create a testbench using the HDL editor.
To create a testbench using the HDL editor:
1.
Click and drag in the SW4 signal to draw a high segment from 0 to 5 μs. When you release the mouse button,
WaveFormer Lite switches your state to LOW.
Click and drag in the SW4 signal to draw a low segment from 5 us to 6.8 μs.
Follow similar procedure to enter the rest of the input signals. You will get a waveform similar to the one shown in
Figure
A waveform was pre-drawn for you and you can find it in the stimulus folder.
After creating the waveforms, select Save As from the File menu. In the Save As dialog box, enter test_tbench.btim
as the file name and click Save.
After saving the timing diagram file, select Export Timing Diagram As from the Export menu.
Select VHDL w/ Top Level Testbench in Files of Type and enter test_tbench.vhd for the file name, as shown in
Figure
The WaveFormer Lite Report window displays the VHDL testbench with a component declaration and
instantiation inside.
under ModelSim.
From the File menu, select New. This opens the New File dialog box.
7-18.
7-19.
Figure 7-18. Testbench Waveform for the Tutorial Design
Figure 7-19. Export VHDL Testbench Save As Dialog Box
ProASIC3/E Starter Kit User’s Guide and Tutorial
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