ADC1210S065HN/C1:5 NXP Semiconductors, ADC1210S065HN/C1:5 Datasheet - Page 29

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ADC1210S065HN/C1:5

Manufacturer Part Number
ADC1210S065HN/C1:5
Description
ADC1210S065HN/HVQFN40/REEL13DP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ADC1210S065HN/C1:5

Number Of Bits
12
Sampling Rate (per Second)
65M
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935289036518
ADC1210S065HN,518
ADC1210S065HN,518
Table 19.
Addr
Hex
0005
0006
0008
0011
0012
0013
0014
0015
0016
0017
0020
0021
0022
Register name
Reset and
operating mode
Clock
Internal reference R/W
Output data
standard
Output clock
Offset
Test pattern 1
Test pattern 2
Test pattern 3
Fast OTR
CMOS output
LVDS DDR O/P 1 R/W
LVDS DDR O/P 2 R/W
Register allocation map
11.6.3 Register allocation map
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SW_RST
Bit 7
-
-
-
-
-
-
-
-
-
-
Bit 6
TESTPAT_USER[3:0]
-
-
-
-
-
-
-
-
-
-
DAVI_x2_EN
RESERVED[2:0]
Bit 5
-
-
-
-
-
-
-
-
SE_SEL
LVDS_
CMOS
Bit 4
-
-
-
-
-
-
TESTPAT_USER[11:4]
DAVI[1:0]
BI_BYTE_WISE
Bit definition
INTREF_EN
FASTOTR
DIFF_SE
OUTBUF
DAVINV
Bit 3
DIG_OFFSET[5:0]
-
-
-
DAV_DRV[1:0]
OUTBUS_SWAP
DATAI_x2_EN
Bit 2
-
-
-
LVDS_INT_TER[2:0]
FASTOTR_DET[2:0]
TESTPAT_SEL[2:0]
DAVPHASE[2:0]
INTREF[2:0]
CLKDIV
DATA_FORMAT[1:0]
Bit 1
DATA_DRV[1:0]
OP_MODE[1:0]
-
DATAI[1:0]
DCS_EN 0000
Bit 0
-
Default
Bin
0000
0000
0001
0000
0000
0000
0000
0000
1110
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
1110
0000
0000
0000
0000

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