ADC1210S065HN/C1:5 NXP Semiconductors, ADC1210S065HN/C1:5 Datasheet - Page 34

• Manufacturer Part Number: ADC1210S065HN/C1:5
• Description: ADC1210S065HN/HVQFN40/REEL13DP
• Manufacturer: NXP Semiconductors

Specifications of ADC1210S065HN/C1:5

• Number Of Bits: 12
• Sampling Rate (per Second): 65M
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935289036518; ADC1210S065HN,518; ADC1210S065HN,518

NXP Semiconductors
Table 31.
Default values are highlighted.
Table 32.
Default values are highlighted.
ADC1210S_SER
Product data sheet
Bit
7 to 6
5
4 to 3
2
1 to 0
Bit
7 to 4
3
2 to 0
Symbol
-
DAVI_x2_EN
DAVI[1:0]
DATAI_x2_EN
DATAI[1:0]
LVDS_INT_TER[2:0]
Symbol
-
BIT_BYTE_WISE
LVDS DDR output register 1 (address 0021h) bit description
LVDS DDR output register 2 (address 0022h) bit description
Access
R/W
R/W
R/W
R/W
Access
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Value
00
0
1
00
01
10
11
0
1
00
01
10
11
Rev. 2 — 23 December 2010
Value
0000
0
1
000
001
010
011
100
101
110
111
Description
not used
double LVDS current for DAV LVDS buffer
LVDS current for DAV LVDS buffer
double LVDS current for DATA LVDS buffer
LVDS current for DATA LVDS buffer
disabled
enabled
3.5 mA
4.5 mA
1.25 mA
2.5 mA
disabled
enabled
3.5 mA
4.5 mA
1.25 mA
2.5 mA
Description
not used
DDR mode for LVDS output
internal termination for LVDS buffer (DAV and DATA)
Single 12-bit ADC; CMOS or LVDS DDR digital outputs
bit wise (even data bits output on DAV rising edge/odd
data bits output on DAV falling edge)
byte wise (MSB data bits output on DAV rising edge/LSB data
bits output on DAV falling edge)
no internal termination
300 
180 
110 
150 
100 
81 
60 
ADC1210S series
© NXP B.V. 2010. All rights reserved.
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