ADC1210S065HN/C1:5 NXP Semiconductors, ADC1210S065HN/C1:5 Datasheet - Page 30

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ADC1210S065HN/C1:5

Manufacturer Part Number
ADC1210S065HN/C1:5
Description
ADC1210S065HN/HVQFN40/REEL13DP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ADC1210S065HN/C1:5

Number Of Bits
12
Sampling Rate (per Second)
65M
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935289036518
ADC1210S065HN,518
ADC1210S065HN,518
NXP Semiconductors
Table 20.
Default values are highlighted.
Table 21.
Default values are highlighted.
ADC1210S_SER
Product data sheet
Bit
7
6 to 4
3 to 2
1 to 0
Bit
7 to 5
4
3
2
1
0
Symbol
-
SE_SEL
DIFF_SE
-
CLKDIV
DCS_EN
Symbol
SW_RST
RESERVED[2:0]
-
OP_MODE[1:0]
Reset and operating mode control register (address 0005h) bit description
Clock control register (address 0006h) bit description
Access
R/W
R/W
R/W
R/W
Access
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Value
000
0
1
0
1
0
0
1
0
1
Value
0
1
000
00
00
01
10
11
Rev. 2 — 23 December 2010
Description
not used
single-ended clock input pin select
differential/single-ended clock input select
not used
clock input divide by 2
duty cycle stabilizer
CLKM
CLKP
fully differential
single-ended
disabled
enabled
disabled
enabled
Single 12-bit ADC; CMOS or LVDS DDR digital outputs
Description
reset digital section
reserved
not used
operating mode
no reset
performs a reset of the SPI registers
normal (power-up)
power-down
sleep
normal (power-up)
ADC1210S series
© NXP B.V. 2010. All rights reserved.
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