SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 157

• Manufacturer Part Number: SAA7115HLBE
• Description: Video ICs ADV DGTL VIDEO DECODR
• Manufacturer: NXP Semiconductors

Specifications of SAA7115HLBE

• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-407
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SAA7115HL/V1,557 SAF7115HLBE

SPDIF Out
10.1
In this document, the generic PNX1300 name refers
to the PNX1300 Series, or the PNX1300/01/02/11
products.
The PNX1300 SPDIF Output unit (SPDO) allows gener-
ation of a 1-bit high-speed serial data stream. The prima-
ry application is to make SPDIF (Sony/Philips Digital In-
terface) data available for use by external audio
equipment.
The SPDO unit has the following features:
• fully compliant with IEC958, for both consumer and
• supports 2-channel linear PCM audio, with 16 or 24
• supports one or more Dolby Digital(r) 6-channel data
• supports one or more MPEG-1 or MPEG-2 audio
• allows arbitrary, programmable, sample rates from 1
• can output data with a sample rate independent of
• hardware performs autonomous DMA of memory
• hardware performs parity generation and bi-phase
• allows software to have full control over all data con-
Alternate use of the SPDO unit to generate a general-
purpose high-speed data stream is possible. Potential
applications include use as a high-speed UART or high
speed serial data channel. In this case features are:
• up to 40 Mbit/sec data rate
• full software control over each bit cell transmitted
• LSB first or MSB first data format
10.2
The external interface consists of only one pin, SPDO,
which is described in
An external circuit (see
vide an electrically isolated output and convert the 3.3 V
output pin to a drive level of 0.5 V peak-peak into a 75-
professional applications
bits per sample
streams embedded per Project 1937
streams embedded per Project 1937
Hz to 300 kHz
and asynchronous to the sample rate of the Audio
Out (AO) unit
resident IEC958 sub-frames
mark encoding
tent, including user and channel data
SPDIF OUT OVERVIEW
EXTERNAL INTERFACE
Table
Figure
10-1.
10-1) is required to pro-
Figure 10-1. External SPDIF interface circuitry
ohm load, as required for consumer applications of IEC-
958.
Table 10-1. SPDO external signals
10.3
In both SPDIF and transparent DMA modes, SPDO
sends alternating memory data buffers out across the
output pin. Software initially gives SPDO two memory
data buffers and enables the SPDO unit. When the first
buffer is sent, SPDO requests a new buffer from software
while switching over to use the other buffer, etc. Trans-
mission continues uninterrupted until the unit is disabled.
10.3.1
SPDIF driver software assembles SPDIF data in each
memory data buffer. Each memory data buffer consists
of groups of 32-bit words in memory. Each word de-
scribes the data to be transmitted for a single IEC-958
sub-frame, including what type of preamble is to be in-
cluded. Each sub-frame is transmitted in 64-clock cycle
intervals of the SPDO clock, a programmable clock gen-
erated by the SPDO Direct Digital Synthesizer (DDS).
10.3.2
In transparent DMA mode, software prepares each data
bit exactly as it is to be transmitted, in a series of 32-bit
words in each memory data buffer. Each 32-bit word is
PRELIMINARY SPECIFICATION
PNX1300
SPDO
Signal
SPDO
SUMMARY OF OPERATION
SPDIF Mode
Transparent DMA Mode
by Gert Slavenburg, Santanu Dutta
Type
I/O
10 uF
SPDIF output. Self clocking interface
carrying either 2-channel PCM data with
samples up to 24 bits, or encoded Dolby
AC-3(r) or MPEG audio data for decod-
ing by an external audio component.
240E
110E
Chapter 10
Description
1.5 - 7 MHz
transformer
1:1
phono
RCA
10-1