SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 201

• Manufacturer Part Number: SAA7115HLBE
• Description: Video ICs ADV DGTL VIDEO DECODR
• Manufacturer: NXP Semiconductors

Specifications of SAA7115HLBE

• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-407
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SAA7115HL/V1,557 SAF7115HLBE

System Boot
13.1
In this document, the generic PNX1300 name refers
to the PNX1300 Series, or the PNX1300/01/02/11
products.
Before a PNX1300 system can begin operating, the
main-memory interface (MMI) registers and on-chip
clock ratio register must be configured. Since the
DSPCPU cannot begin operating until after these regis-
ters and circuits are initialized, the DSPCPU cannot be
relied on to initialize these resources. Consequently,
PNX1300 needs an independent bootstrap facility for
low-level initialization.
PNX1300 implements low-level system initialization by
combining a small block of on-chip system boot logic with
a single external serial boot EEPROM connected to the
I
I
space-efficient and inexpensive. The amount of informa-
tion needed for initial system boot is small, so speed is
not a concern.
The PNX1300 system boot block performs differently for
each of two major types of PNX1300 system, distin-
guished by host-assisted and autonomous bootstrap-
ping. The most significant bit of the tenth byte in the ex-
ternal EEPROM determines the system boot procedure
and must match the system configuration.
In host-assisted bootstrapping, a PNX1300 device is in-
tegrated into a system where some other processor
serves as the host. For example, a PNX1300 chip might
2
2
Figure 13-1. The system boot logic uses the I2C in-
terface to access a serial EEPROM that contains
main-memory and system timing information.
C interface. See
C interface are slow but have the advantages of being
BOOT SEQUENCE OVERVIEW
System Boot
I
PNX1300
2
C Interface
Block
Figure
13-1. Serial EEPROMs with an
SDA
SCL
V
dd
EEPROM
Serial
by Gert Slavenburg, Bob Bradfield, and Hani Salloum
be part of a PCI card in a standard personal computer
(PC). In this case, the PNX1300 system boot only needs
to load enough information from the serial EEPROM to
configure the on-chip timing circuits and MMI; the host
processor can perform all other PNX1300 setup chores.
Table 13-1. System Boot Features
In the second type of system, autonomous bootstrapping
takes place. In this configuration, a PNX1300 device
serves as the host (main) processor; consequently, the
PNX1300 system boot must perform more work. In addi-
tion to configuring on-chip timing and the MMI, the sys-
tem boot must set the base addresses of the main mem-
ory and MMIO address apertures and load into main
memory a level 1 bootstrap program for the DSPCPU.
Only the first 10 bytes of the serial EEPROM are needed
when PNX1300 is not the host PCI processor; thus, such
systems can use a very low-cost 128-byte EEPROM de-
vice. When PNX1300 serves as the system’s host pro-
cessor, the boot logic permits almost 2 KB of storage for
the level 1 bootstrap DSPCPU program in a single eight-
pin EEPROM device.
PRELIMINARY SPECIFICATION
Boot Configurations
Supported
ROM Device Types
Supported
ROM device
examples
ROM size
Characteristic
• Host assisted, e.g., PNX1300 is a
• Autonomous, e.g., PNX1300 is the
• Single standard I
• EEPROMs connect via the
• The use of EEPROMs with hard-
• The EEPROM must respond to I
• Atmel 24C01A (128 bytes, WP)
• Atmel 24C08 (1KB, WP)
• Atmel 24C16 (2KB, WP).
• From 128 bytes to 2 KB (one
PCI slave in a standard PC.
host PCI processor.
EEPROMs from 128 bytes to 2KB
in size.
PNX1300 built-in 2-wire I
face.
ware Write Protect (WP) is recom-
mended. A jumper on WP allows
user control over in-system repro-
gramming using the I
device address 1010.
device) for initial program load.
Chapter 13
Comments
2
C serial
2
C interface.
2
C inter-
13-1
2
C