SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 431

• Manufacturer Part Number: SAA7115HLBE
• Description: Video ICs ADV DGTL VIDEO DECODR
• Manufacturer: NXP Semiconductors

Specifications of SAA7115HLBE

• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-407
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SAA7115HL/V1,557 SAF7115HLBE

PNX1300/01/02/11 Data Book
lsl
SYNTAX
FUNCTION
DESCRIPTION
arguments. (Note: pseudo operations cannot be used in assembly source files.)
and rdest is set to rsrc1 logically shifted left by this amount. If the rsrc2<31:5> value is not zero, then take this as a
shift by 32 or more bits. Zeros are shifted into the LSBs of rdest while the MSBs shifted out of rsrc1 are lost.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
A-133
r60 = 0x20, r30 = 3
r10 = 0, r60 = 0x20, r30 = 3
r20 = 1, r60 = 0x20, r30 = 3
r70 = 0xfffffffc, r40 = 2
r80 = 0xe, r50 = 0xfffffffe
r30 = 0x7008000f, r45 = 0x20
r30 = 0x8008000f, r45 = 0x80000000
r30 = 0x8008000f, r45 = 0x23
The
As shown below, the
The
[ IF rguard ] lsl rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
n ← rsrc2<4:0>
rdest<31:n> ← rsrc1<31–n:0>
rdest<n–1:0> ← 0
if rsrc2<31:5> != 0 {
}
rdest <- 0
lsl
lsl
31
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
operation is a pseudo operation that is transformed by the scheduler into an
Intermediate result
(example: n = 3)
lsl
PRELIMINARY SPECIFICATION
operation takes two arguments, rsrc1 and rsrc2. Rsrc2 specify an unsigned shift amount,
rdest
lsl r60 r30 → r90
IF r10 lsl r60 r30 → r100
IF r20 lsl r60 r30 → r110
lsl r70 r40 → r120
lsl r80 r50 → r125
lsl r30 r45 → r100
lsl r30 r45 → r100
lsl r30 r45 → r100
31
32 bits from rsrc1
Operation
0
Left shifter
rsrc2
31
r90 ← 0x100
no change, since guard is false
r110 ← 0x100
r120 ← 0xfffffff0
r125 ← 0x00000000 (shift by more than 32))
r100 ← 0x00000000
r100 ← 0x00000000
r100 ← 0x00000000
3
0
0
0
0
0
0
0
asl asli asr asri lsli lsr
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
Philips Semiconductors
lsri rol roli
Logical shift left
ATTRIBUTES
Result
SEE ALSO
rsrc2
pseudo-op for asl
asl
with the same
shifter
1, 2
No
0
19
—
2
1