SLXT332QE.G2 Cortina Systems Inc, SLXT332QE.G2 Datasheet - Page 13

• Manufacturer Part Number: SLXT332QE.G2
• Manufacturer: Cortina Systems Inc

Specifications of SLXT332QE.G2

• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

LXT332
Datasheet
249075, Revision 2.0
26 June 2007
Table 1
Table 2
Cortina Systems
1. DI = Digital Input; DO = Digital Output; DI/O = Digital Input/Output; AI = Analog Input; AO = Analog Output; S = Power
1.
2. DI = Digital Input; DO = Digital Output; DI/O = Digital Input/Output; AI = Analog Input; AO = Analog Output; S = Power
QFP
Pin
29
30
31
32
33
34
35
36
37
38
QFP
Pin
41
42
43
44
34
Supply.
Table 1
Supply.
PLCC
Pin
35
36
37
38
39
40
41
42
43
44
describes the pins that do not change function in Unipolar Host mode and functions of pins unique to Bipolar mode.
PLCC
Pin
40
3
4
5
6
Host Mode and Bipolar Host Mode Pin Descriptions (Sheet 3 of 3)
Unipolar Host Mode Pin Descriptions
®
LXT332 Dual T1/E1 Line Interface Unit with Crystal-less Jitter Attenuation
(Bipolar)
(Bipolar)
(Bipolar)
(Bipolar)
Symbol
RNEG1
RPOS1
TNEG1
TPOS1
RCLK1
TCLK1
VCQE
VCQ1
SDO
SPE
RDATA0
RDATA1
Symbol
TDATA0
ECE0
BPV0
I/O
DI/O
DO
DO
DO
DO
DI
DI
DI
DI
DI
1
I/O
DO
DO
DO
DI
DI
Violation Insert, High Frequency Clock, or QRSS
selected by the VCQE pin. Refer to VCQ0 signal description for details.
Serial Port Enable. When clocked with MCLK, Host mode is enabled. In Host mode
the LXT332 is controlled by a μP via the serial port.
Violation Insert, High Frequency Clock, QRSS Enable. When set High, selects the
Bipolar Violation (BPV) insertion function on VCQ0 and VCQ1.
When set Low, selects the High Frequency Clock (HFC) function on VCQ0 and VCQ1.
When clocked with MCLK, selects the Quasi Random Signal Source (QRSS) function
on VCQ0 and VCQ1, and enables the QRSS Generate and Detect function on PD0
and PD1.
Serial Data Output. This pin carries read data from the LXT332 registers. When CLKE
is High, SDO is valid on the rising edge of SCLK. When CLKE is Low, SDO is valid on
the falling edge of SCLK.
Receive Clock
Under Loss of Signal (LOS) conditions, RCLK1 is derived from MCLK.
Receive Positive and Negative Data
the data outputs from port 1. See RPOS0 and RNEG0 for signal descriptions.
Transmit Positive and Negative Data
the positive and negative sides of a bipolar input pair for port 1. Data to be transmitted
onto the twisted
Transmit Clock
inputs are sampled on the falling edge of TCLK1.
2
Transmit Data
the twisted
Encoder Enable
B8ZS or HDB3 encoder/decoder for port 0.
Bipolar Violation
that a bipolar violation was detected at port 0.
Receive Data
(NRZ) output. CLKE determines the RCLK0 edge that RDATA0 is stable and valid.
Receive Data
(NRZ) output. CLKE determines the RCLK1 edge that RDATA1 is stable and valid.
-
pair line from port 0 is input at this pin.
-
-
pair line is input at these pins.
-
Port 1. Normally, this clock is recovered from the port 1 input signal.
Port 1. 1.544 MHz for T1, 2.048 MHz for E1. The port 1 transmit data
-
-
-
Port 0. In the Unipolar I/O mode, RDATA0 is a Non Return
Port 1. In the Unipolar I/O mode, RDATA1 is a Non Return
Port 0. In the Unipolar I/O mode, the data to be transmitted onto
-
-
Port 0. In the Unipolar I/O mode, a High on this pin enables the
Port 0. In the Unipolar I/O mode, this pin goes High to indicate
1
(Sheet 1 of 2)
Description
-
Description
-
Port 1. In the Bipolar I/O mode, these pins are
Port 1. In the Bipolar I/O mode, these pins are
3.0 Pin Assignments and Signal
-
Port 1. The function of this pin is
Descriptions
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-
to
to
Page 13
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-
Zero
Zero