SLXT970AQC.B11-831643 Cortina Systems Inc, SLXT970AQC.B11-831643 Datasheet - Page 44

• Manufacturer Part Number: SLXT970AQC.B11-831643
• Manufacturer: Cortina Systems Inc

Specifications of SLXT970AQC.B11-831643

• Number Of Receivers: 1
• Data Rate: 10/100Mbps
• Operating Supply Voltage (typ): 5V
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Mounting: Surface Mount
• Pin Count: 64
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Lead Free Status / RoHS Status: Not Compliant

Intel
3.3.5.2
3.3.6
3.3.6.1
3.3.6.2
44
®
LXT970A Dual-Speed Fast Ethernet Transceiver
Fiber
The fiber interface consists of a pseudo-ECL transmit and receive pair to an external fiber optic
transceiver. The transmit pair should be AC-coupled to the transceiver, and biased to 3.7V with a
50Ω equivalent impedance. The receive pair can be DC-coupled, and should be biased to 3.0V with
a 50
these requirements.
The following guidelines apply to when laying out any differential pair:
Interface for the MII
Transmit Hold Time Adjustment
Transmit hold time for TXD, TX_EN, and TX_ER from TX_CLK High is currently specified in
Table
specification. Depending on the specification of the MAC or ASIC used in your design, you may or
may not need to account for this in your PC board design.
If you determine that a timing adjustment is required, there are a couple of recommended ways to
do this.
Note that some delay is introduced by the actual PC board traces themselves.
MII Terminations
When the LXT970A Transceiver is configured with high-strength MII driver levels (bit 17.3 = 0),
55Ω series termination resistors are recommended on all MII output signals to avoid undershoot
and overshoot.
When 17.3 = 1, the MI driver levels are reduced by a factor of ten and termination resistors are not
required on the MII outputs.
•
•
•
•
•
•
•
Ω
Space both members close together allowing nothing to come between them.
Keep distances as short as possible, both traces should have the same length.
Avoid layer changes as much as possible.
Keep termination circuits close together and on the same side of the board.
Always put termination circuits close to the source end of any circuit.
If using series resistors in the TXD lines, increase the value of the resistors to achieve the
necessary delay.
An alternative method is to add the appropriate delay in the TX_CLK line. Depending on the
amount of delay required, this may be accomplished with a series resistor or by adding a buffer
to the TX_CLK line.
32,
equivalent impedance.
Table
34,
Table
36, and
Figure 21 on page 46
Table 38
as 5 ns minimum. 0 ns minimum is the IEEE
shows the correct bias networks to achieve
Datasheet