SLXT970AQC.B11-831643 Cortina Systems Inc, SLXT970AQC.B11-831643 Datasheet - Page 70

• Manufacturer Part Number: SLXT970AQC.B11-831643
• Manufacturer: Cortina Systems Inc

Specifications of SLXT970AQC.B11-831643

• Number Of Receivers: 1
• Data Rate: 10/100Mbps
• Operating Supply Voltage (typ): 5V
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Mounting: Surface Mount
• Pin Count: 64
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Lead Free Status / RoHS Status: Not Compliant

Intel
70
17.15:4
17.3
17.2
17.1
17.0
18.15
18.14
18.13:0
1. R/W = Read /Write
1. RO = Read Only
Bit
Bit
Table 53. Interrupt Enable Register (Address 17, Hex 11)
Table 54. Interrupt Status Register (Address 18, Hex 12)
®
LXT970A Dual-Speed Fast Ethernet Transceiver
Reserved
MIIDRVLVL
LNK
CRITERIA
INTEN
TINT
MINT
XTALOK
Reserved
Name
Name
1 = Indicates MII interrupt pending.
0 = Indicates no MII interrupt pending. This bit is cleared by reading
Register 1 followed by reading Register 18.
1 = Indicates that the LXT970A Transceiver is fully powered up and the
on-chip clocks are stable.
0 = Indicates that XTAL circuit is not stable.
Ignore
Write as 0; ignore on read.
1 = Reduced MII driver levels. Pull-down strength of the MII driver is
reduced by a factor of 10, and the pull-up strength is reduced by a factor
of 8. Reduced driver levels on the MII I/O pins are recommended for
managed multi-port applications.
0 = High-strength MII driver levels that can effectively source 50 - 60 mA.
Series termination resistors (55 Ω) are recommended on all output
signals when using this level to avoid undershoot or overshoot.
1 = Enhanced link loss criteria. Link loss criteria is independent of symbol
error rate. Loss of scrambler lock for more than 1 - 2 msec will brings the
link down. Link up criteria is based on symbol error rate.
0 = Standard link criteria. Both link up and link loss are based on symbol
error rate.
1 = Enable interrupts. Must be enabled for bit 17.0 or 19.12 to be
effective.
0 = Disable interrupts.
1 = Forces MDINT Low and sets bit 18.15 = 1. Also forces interrupt
pulse on MDIO when bit 19.12 = 1.
0 = Normal operation.
This bit is ignored unless the interrupt function is enabled (17.1 = 1).
Description
Description
Type
Type
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
1
1
Datasheet
Default
Default
N/A
N/A
0
0
0
0
0
0