PIC32MX575F512LT-80I/BG Microchip Technology, PIC32MX575F512LT-80I/BG Datasheet - Page 110

• Manufacturer Part Number: PIC32MX575F512LT-80I/BG
• Description: 512KB Flash, 64KB RAM, 80 MHz, USB, 1xCAN, 8 DMA 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX575F512LT-80I/BG

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 4-47:
Legend:
Note
9000
9010
9020
9030
9040
9050
9060
9070
9080
9090
90A0
90B0 ETHRXWM
90C0
90D0
ETHPMM0
ETHPMM1
ETHPMCS
ETHCON1
ETHCON2
ETHRXST
ETHRXFC
ETHTXST
ETHPMO
1:
2:
ETHHT0
ETHHT1
ETHIEN
ETHIRQ
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table (with the exception of ETHSTAT) have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
INV Registers”
Reset values default to the factory programmed value.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
ETHERNET CONTROLLER REGISTER SUMMARY FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX664F064L,
PIC32MX664F128L, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H,
PIC32MX795F512H, PIC32MX695F512L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX764F128H, PIC32MX764F128L,
PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES
31/15
HTEN
ON
for more information.
—
—
—
—
—
—
—
—
—
—
—
TXBUSE
BUSEIE
30/14
MPEN
FRZ
TX
—
—
—
—
—
—
—
—
—
RXBUSE
BUSEIE
29/13
SIDL
RX
—
—
—
—
—
—
—
—
—
—
NOTPM
28/12
—
—
—
—
—
—
—
—
—
—
—
—
27/11
—
—
—
—
—
—
—
—
—
—
—
—
26/10
PMMODE<3:0>
—
—
—
—
—
—
—
—
—
—
—
EWMARK
MARKIE
TXRTS
TXSTADDR<15:2>
RXSTADDR<15:2>
25/9
EW
—
—
—
—
—
—
—
—
FWMARK
MARKIE
RXEN
TXSTADDR<31:16>
RXSTADDR<31:16>
24/8
FW
—
—
—
—
—
—
—
—
PMM<63:32>
PMCS<15:0>
PMM<31:0>
PMO<15:0>
PTV<15:0>
HT<63:32>
HT<31:0>
Bits
RXBUFSZ<6:0>
AUTOFC
RXDONE
DONEIE
ERREN
23/7
CRC
RX
—
—
—
—
—
—
PKTPEND
TPENDIE
OKEN
22/6
CRC
PK
—
—
—
—
—
—
—
(1)
ERREN
RXACT
ACTIE
RUNT
21/5
RX
—
—
—
—
—
—
—
RUNTEN
MANFC
20/4
—
—
—
—
—
—
—
—
RXFWM<7:0>
RXEWM<7:0>
TXDONE
DONEIE
UCEN
19/3
TX
—
—
—
—
—
—
—
—
TXABORT
ABORTIE
MEEN
18/2
NOT
TX
—
—
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and
RXBUFNA
BUFNAIE
MCEN
17/1
RX
—
—
—
—
—
—
—
—
—
—
RXOVFLW
BUFCDEC
OVFLWIE
BCEN
16/0
RX
—
—
—
—
—
—
—
—
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000