PIC32MX575F512LT-80I/BG Microchip Technology, PIC32MX575F512LT-80I/BG Datasheet - Page 37

• Manufacturer Part Number: PIC32MX575F512LT-80I/BG
• Description: 512KB Flash, 64KB RAM, 80 MHz, USB, 1xCAN, 8 DMA 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX575F512LT-80I/BG

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 1-1:
© 2010 Microchip Technology Inc.
SCK3
SDI3
SDO3
SS3
SCK2
SDI2
SDO2
SS2
SCK4
SDI4
SDO4
SS4
SCL1
SDA1
SCL3
SDA3
SCL2
SDA2
SCL4
SDA4
SCL5
SDA5
TMS
TCK
TDI
TDO
RTCC
CV
CV
CV
C1IN-
C1IN+
C1OUT
C2IN-
C2IN+
C2OUT
PMA0
PMA1
Legend: CMOS = CMOS compatible input or output
Note 1:
Pin Name
REF
REF
REFOUT
2:
-
+
ST = Schmitt Trigger input with CMOS levels
TTL = TTL input buffer
Pin numbers are provided for reference only. See the
See
QFN/TQFP
Section 24.0 “Ethernet Controller”
64-Pin
PINOUT I/O DESCRIPTIONS (CONTINUED)
49
50
51
43
29
31
32
21
44
43
51
50
32
31
23
27
28
24
42
15
16
23
12
21
14
13
22
30
29
—
—
11
4
5
6
8
6
5
Pin Number
100-Pin
TQFP
48
52
53
47
10
12
14
39
49
50
40
66
67
53
52
58
59
12
50
49
17
38
60
61
68
28
29
34
21
23
44
43
11
11
20
32
22
33
(1)
121-Pin
XBGA
G10
G11
K11
L10
E11
K11
H11
L10
J10
L11
J10
L11
G3
G9
H2
H1
K9
E3
F4
F2
F3
L6
K6
E8
F2
F4
E9
K3
K4
L8
K7
L9
J6
L2
L5
J2
J1
L4
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
for more information.
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
PIC32MX5XX/6XX/7XX
TTL/ST
TTL/ST
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
“Pin
Analog = Analog input
O = Output
Diagrams” section for device pin availability.
Synchronous serial clock input/output for SPI3
SPI3 data in
SPI3 data out
SPI3 slave synchronization or frame pulse I/O
Synchronous serial clock input/output for SPI2
SPI2 data in
SPI2 data out
SPI2 slave synchronization or frame pulse I/O
Synchronous serial clock input/output for SPI4
SPI4 data in
SPI4 data out
SPI4 slave synchronization or frame pulse I/O
Synchronous serial clock input/output for I2C1
Synchronous serial data input/output for I2C1
Synchronous serial clock input/output for I2C3
Synchronous serial data input/output for I2C3
Synchronous serial clock input/output for I2C2
Synchronous serial data input/output for I2C2
Synchronous serial clock input/output for I2C4
Synchronous serial data input/output for I2C4
Synchronous serial clock input/output for I2C5
Synchronous serial data input/output for I2C5
JTAG Test mode select pin
JTAG test clock input pin
JTAG test data input pin
JTAG test data output pin
Real-Time Clock alarm output
Comparator Voltage Reference (low)
Comparator Voltage Reference (high)
Comparator Voltage Reference output
Comparator 1 negative input
Comparator 1 positive input
Comparator 1 output
Comparator 2 negative input
Comparator 2 positive input
Comparator 2 output
Parallel Master Port Address bit 0 input
(Buffered Slave modes) and output (Master
modes)
Parallel Master Port Address bit 1 input
(Buffered Slave modes) and output (Master
modes)
Description
P = Power
I = Input
DS61156F-page 37