FW82801DB S L66K Intel, FW82801DB S L66K Datasheet - Page 52

• Manufacturer Part Number: FW82801DB S L66K
• Manufacturer: Intel

Specifications of FW82801DB S L66K

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Signal Description
2.19
52
Table 2-19. Power and Ground Signals
Power and Ground
V5REF_Sus
VccSus3_3
VccSus1_5
V_CPU_IO
VccRTC
VccPLL
Vcc3_3
Vcc1_5
V5REF
VBIAS
HIREF
VccHI
Name
Vss
3.3 V supply for core well I/O buffers. This power may be shut off in S3, S4, S5 or G3
states.
1.5 V supply for core well logic. This power may be shut off in S3, S4, S5 or G3 states.
1.5 V supply for Hub Interface 1.5 logic.
1.8 V supply for Hub Interface 1.0 logic.
This power may be shut off in S3, S4, S5 or G3 states.
Reference for 5 V tolerance on core well inputs. This power may be shut off in S3, S4,
S5 or G3 states.
Analog Input. Expected voltages are:
This power is shut off in S3, S4, S5, and G3 states.
3.3 V supply for resume well I/O buffers. This power is not expected to be shut off
unless the system is unplugged.
1.5 V supply for resume well logic. This power is not expected to be shut off unless the
system is unplugged.
Reference for 5 V tolerance on resume well inputs. This power is not expected to be
shut off unless the system is unplugged.
3.3 V (can drop to 2.0 V min. in G3 state) supply for the RTC well. This power is not
expected to be shut off unless the RTC battery is removed or completely drained.
NOTE: Implementations should not attempt to clear CMOS by using a jumper to pull
1.5 V supply for core well logic. This signal is used for the USB PLL. This power may
be shut off in S3, S4, S5, or G3 states.
RTC well bias voltage. The DC reference voltage applied to this pin sets a current that
is mirrored throughout the oscillator and buffer circuitry. See
Powered by the same supply as the processor I/O voltage. This supply is used to drive
the processor interface outputs.
Grounds.
• 0.9 V for HI 1.0 (Normal Hub Interface) Series Termination
• 350 mV for HI 1.5 (Enhanced Hub Interface) Parallel Termination
VccRTC low. Clearing CMOS in an Intel
by using a jumper on RTCRST# or GPI, or using SAFEMODE strap.
Description
®
ICH4-based platform can be done
Intel
®
82801DB ICH4 Datasheet
Section
2.20.4.