LMK03200ISQE/NOPB National Semiconductor, LMK03200ISQE/NOPB Datasheet - Page 33

• Manufacturer Part Number: LMK03200ISQE/NOPB
• Description: IC CLOCK CONDITIONER PREC 48-LLP
• Manufacturer: National Semiconductor
• Type: Clock Conditionerr

Specifications of LMK03200ISQE/NOPB

• Pll: Yes
• Input: Clock
• Output: LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:9
• Differential - Input:output: Yes/Yes
• Frequency - Max: 1.296GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Frequency-max: 1.296GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMK03200ISQETR

3.5 CURRENT CONSUMPTION / POWER DISSIPATION
CALCULATIONS
Due to the myriad of possible configurations the following ta-
ble serves to provide enough information to allow the user to
From Table 3.5 the current consumption can be calculated in
any configuration. For example, the current for the entire de-
vice with 1 LVDS (CLKout0) & 1 LVPECL (CLKout4) output
in Bypassed mode can be calculated by adding up the fol-
lowing blocks: core current, low clock buffer, high clock buffer,
one LVDS output buffer current, and one LVPECL output
buffer current. There will also be one LVPECL output drawing
emitter current, but some of the power from the current draw
is dissipated in the external 120 Ω resistors which doesn't add
to the power dissipation budget for the device. If delays or
divides are switched in, then the additional current for these
stages needs to be added as well.
For power dissipated by the device, the total current entering
the device is multiplied by the voltage at the device minus the
power dissipated in any emitter resistors connected to any of
the LVPECL outputs. If no emitter resistors are connected to
Table 3.5 - Block Current Consumption
Block
Entire device,
core current
Low clock buffer
(internal)
High clock buffer
(internal)
Output buffers
Divide circuitry
per output
Delay circuitry
per output,
PLL_R_DLY, or
PLL_N_DLY
Entire device
Condition
All outputs off; No LVPECL emitter resistors connected
The low clock buffer is enabled anytime one of
CLKout0 through CLKout3 are enabled
The high clock buffer is enabled anytime one of the
CLKout4 through CLKout7 are enabled
Fout buffer, EN_Fout = 1
LVDS output, Bypassed mode
LVPECL output, Bypassed mode (includes 120 Ω
emitter resistors)
LVPECL output, disabled mode (includes 120 Ω
emitter resistors)
LVPECL output, disabled mode. No emitter resistors
placed; open outputs
Divide enabled, divide = 2
Divide enabled, divide > 2
Delay enabled, delay < 8
Delay enabled, delay > 7
CLKout0 & CLKout4 enabled in Bypassed mode
33
calculate estimated current consumption of the device. Un-
less otherwise noted Vcc = 3.3 V, T
the LVPECL outputs, this power will be 0 watts. For example,
in the case of 1 LVDS (CLKout0) & 1 LVPECL (CLKout4) op-
erating at 3.3 volts, we calculate 3.3 V × (86 + 9 + 9 + 17.8 +
40) mA = 3.3 V × 161.8 mA = 533.9 mW. Because the
LVPECL output (CLKout4) has the emitter resistors hooked
up and the power dissipated by these resistors is 60 mW, the
total device power dissipation is 533.9 mW - 60 mW = 473.9
mW.
When the LVPECL output is active, ~1.9 V is the average
voltage on each output as calculated from the LVPECL Voh
& Vol typical specification. Therefore the power dissipated in
each emitter resistor is approximately (1.9 V)
mW. When the LVPECL output is disabled, the emitter resis-
tor voltage is ~1.07 V. Therefore the power dissipated in each
emitter resistor is approximately (1.07 V)
Consumption at
3.3 V (mA)
Current
161.8
86.0
14.5
17.8
17.4
5.3
8.5
5.8
9.9
40
9
9
0
Dissipated in
device (mW)
Power
283.8
29.7
29.7
47.8
58.7
38.3
17.5
28.0
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32.7
474
72
0
A
= 25 °C.
2
/ 120 Ω = 9.5 mW.
LVPECL emitter
resistors (mW)
Dissipated in
2
/ 120 Ω = 30
Power
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