LMK03200ISQE/NOPB National Semiconductor, LMK03200ISQE/NOPB Datasheet - Page 36

• Manufacturer Part Number: LMK03200ISQE/NOPB
• Description: IC CLOCK CONDITIONER PREC 48-LLP
• Manufacturer: National Semiconductor
• Type: Clock Conditionerr

Specifications of LMK03200ISQE/NOPB

• Pll: Yes
• Input: Clock
• Output: LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:9
• Differential - Input:output: Yes/Yes
• Frequency - Max: 1.296GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Frequency-max: 1.296GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMK03200ISQETR

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3.7.3 Termination for Single-Ended Operation
A balun can be used with either LVDS or LVPECL drivers to
convert the balanced, differential signal into an unbalanced,
single-ended signal.
It is possible to use an LVPECL driver as one or two separate
800 mV p-p signals. When DC coupling one of the LMK03200
family clock LVPECL drivers, the termination should still be
50 ohms to Vcc - 2 V as shown in
Thevenin equivalent circuit (120 Ω resistor connected to Vcc
and an 82 Ω resistor connected to ground with the driver con-
nected to the junction of the 120 Ω and 82 Ω resistors) is a
valid termination as shown in
FIGURE 13. Single-Ended LVPECL Operation, DC
FIGURE 14. Single-Ended LVPECL Operation, DC
Coupling, Thevenin Equivalent
Coupling
Figure 14
Figure
for Vcc = 3.3 V.
13. Again the
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When AC coupling an LVPECL driver use a 120 Ω emitter
resistor to provide a DC path to ground and ensure a 50 ohm
termination with the proper DC bias level for the receiver. The
typical DC bias voltage for LVPECL receivers is 2 V (See
3.7.2). If the other driver is not used it should be terminated
with either a proper AC or DC termination. This latter example
of AC coupling a single-ended LVPECL signal can be used to
measure single-ended LVPECL performance using a spec-
trum analyzer or phase noise analyzer. When using most RF
test equipment no DC bias point (0 V DC) is expected for safe
and proper operation. The internal 50 ohm termination the test
equipment correctly terminates the LVPECL driver being
measured as shown in . When using only one LVPECL driver
of a CLKoutX/CLKoutX* pair, be sure to properly terminated
the unused driver.
3.7.4 Conversion to LVCMOS Outputs
To drive an LVCMOS input with an LMK03200 family LVDS
or LVPECL output, an LVPECL/LVDS to LVCMOS converter
such
DS90LV028A, DS90LV048A, etc. is required. For best noise
performance, LVPECL provides a higher voltage swing into
input of the converter.
3.8 OSCin INPUT
In addition to LVDS and LVPECL inputs, OSCin can also be
driven with a sine wave. The OSCin input can be driven sin-
gle-ended or differentially with sine waves. The configurations
for these are shown in
FIGURE 15. Single-Ended LVPECL Operation, AC
FIGURE 16. Single-Ended Sine Wave Input
as
National
Figure 16
Coupling
Semiconductor's
and
Figure
17.
DS90LV018A,
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