LMK03200ISQE/NOPB National Semiconductor, LMK03200ISQE/NOPB Datasheet - Page 7

IC CLOCK CONDITIONER PREC 48-LLP

LMK03200ISQE/NOPB

Manufacturer Part Number
LMK03200ISQE/NOPB
Description
IC CLOCK CONDITIONER PREC 48-LLP
Manufacturer
National Semiconductor
Type
Clock Conditionerr
Datasheet

Specifications of LMK03200ISQE/NOPB

Pll
Yes
Input
Clock
Output
LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
1:9
Differential - Input:output
Yes/Yes
Frequency - Max
1.296GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Frequency-max
1.296GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMK03200ISQETR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMK03200ISQE/NOPB
Manufacturer:
NSC
Quantity:
72
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors
for availability and specifications.
Recommended Operating Conditions
Note 1: "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 2: This device is a high performance integrated circuit with ESD handling precautions. Handling of this device should only be done at ESD protected work
stations. The device is rated to a HBM-ESD of > 2 kV, a MM-ESD of > 200 V, and a CDM-ESD of > 1.2 kV.
Package Thermal Resistance
Note 3: Specification assumes 16 thermal vias connect the die attach pad to the embedded copper plane on the 4-layer JEDEC board. These vias play a key
role in improving the thermal performance of the LLP. It is recommended that the maximum number of vias be used in the board layout.
Power Supply Voltage
Input Voltage
Storage Temperature Range
Lead Temperature (solder 4 s)
Junction Temperature
Ambient Temperature
Power Supply Voltage
Parameter
Parameter
48-Lead LLP
Package
(Note 3)
Symbol
V
T
(Notes 1, 2)
CC
A
Symbol
T
V
V
T
T
STG
CC
IN
L
J
27.4° C/W
θ
7
JA
3.15
Min
-40
θ
J-PAD (Thermal Pad)
-0.3 to (V
5.8° C/W
Typ
3.3
25
-0.3 to 3.6
-65 to 150
Ratings
+260
125
CC
+ 0.3)
Max
3.45
85
Units
°C
°C
°C
www.national.com
V
V
Units
°C
V

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