MPC8349ECVVAGDB Freescale Semiconductor, MPC8349ECVVAGDB Datasheet - Page 25

IC MPU POWERQUICC II 672-TBGA

MPC8349ECVVAGDB

Manufacturer Part Number
MPC8349ECVVAGDB
Description
IC MPU POWERQUICC II 672-TBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8349ECVVAGDB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
672-TBGA
For Use With
MPC8349E-MITX-GP - KIT REFERENCE PLATFORM MPC8349EMPC8349E-MITXE - BOARD REFERENCE FOR MPC8349MPC8349EA-MDS-PB - KIT MODULAR DEV SYSTEM MPC8349E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

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Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
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MPC8349ECVVAGDB
Manufacturer:
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8.2.1.2
Table 26
Figure 9
Freescale Semiconductor
At recommended operating conditions with LV
RX_CLK clock period
RX_CLK duty cycle
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
RXD[7:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise (20%–80%)
RX_CLK clock fall time (80%–20%)
Note:
1. The symbols for timing specifications follow the pattern of t
G
and t
(GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
to the high state (H) or setup time. Also, t
signals (D) went invalid (X) relative to the t
reference symbol is based on three letters representing the clock of a particular function. For example, the subscript of t
represents the GMII (G) receive (RX) clock. For rise and fall times, the latter convention is used with the appropriate letter:
R (rise) or F (fall).
(first two letters of functional block)(reference)(state)(signal)(state)
shows the GMII receive AC timing diagram.
provides the GMII receive AC timing specifications.
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
GMII Receive AC Timing Specifications
RXD[7:0]
RX_CLK
Parameter/Condition
RX_DV
RX_ER
Table 26. GMII Receive AC Timing Specifications
Figure 9. GMII Receive AC Timing Diagram
t
t
GRXH
GRDVKH
DD
/OV
GRDXKL
GRX
t
DD
GRX
clock reference (K) going to the low (L) state or hold time. In general, the clock
of 3.3 V ± 10%.
symbolizes GMII receive timing (GR) with respect to the time data input
for outputs. For example, t
(first two letters of functional block)(signal)(state)(reference)(state)
t
t
GRXF
GRXH
Symbol
t
t
GRDVKH
GRDXKH
t
t
t
GRXR
GRXF
GRX
t
GRDXKH
/t
GRX
1
t
GRXR
Ethernet: Three-Speed Ethernet, MII Management
Min
2.0
0.5
40
GRDVKH
symbolizes GMII receive timing
Typ
8.0
RX
clock reference (K) going
Max
1.0
1.0
60
for inputs
Unit
ns
ns
ns
ns
ns
%
GRX
25

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