MPC8270VVUPEA Freescale Semiconductor, MPC8270VVUPEA Datasheet - Page 24

IC MPU POWERQUICC II 480-TBGA

MPC8270VVUPEA

Manufacturer Part Number
MPC8270VVUPEA
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8270VVUPEA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
450MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
450 MHz
Operating Supply Voltage
0 V to 3 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Program Memory Size
16 KB
Program Memory Type
EPROM/Flash
Core Size
32 Bit
Cpu Speed
450MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
Clock Configuration Modes
In each clocking mode, the configuration of bus, core, PCI, and CPM frequencies is determined by seven bits during
the power-up reset—three hardware configuration pins (MODCK[1–3]) and four bits from hardware configuration
word[28–31] (MODCK_H). Both the PLLs and the dividers are set according to the selected MPC8280 clock
operation mode as described in the following sections.
7.1 Local Bus Mode
Table 16
of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not
exceed the frequency rating of the user’s device.
24
MODCK_H-MODCK[1:3]
0000_000
0000_001
0000_010
0000_100
0000_101
0001_000
0001_001
0001_010
0001_100
0001_101
0010_000
0010_001
0000_011
0000_110
0000_111
0001_011
0001_110
1000_111
0001_111
lists clock configurations for the MPC8280 in local bus mode. The frequencies listed are for the purpose
Mode
2
Clock configurations change only after PORESET is asserted.
MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8
Low
37.5
33.3
37.5
30.0
60.0
50.0
60.0
50.0
50.0
50.0
50.0
37.5
33.3
33.3
33.3
Bus Clock
Table 16. Clock Configurations for Local Bus Mode
(MHz)
133.3
133.3
100.0
100.0
167.0
167.0
160.0
160.0
167.0
167.0
145.8
133.3
133.3
133.3
133.3
High
3
Default Modes (MODCK_H= 0000)
Multiplication
Full Configuration Modes
Factor
CPM
2.5
2.5
3
3
4
4
2
2
2
2
2
3
3
3
3
NOTE
4
112.5
100.0
150.0
120.0
120.0
100.0
150.0
125.0
100.0
100.0
100.0
112.5
100.0
100.0
100.0
Low
CPM Clock
Reserved
Reserved
Reserved
Reserved
(MHz)
400.0
400.0
400.0
400.0
334.0
334.0
400.0
400.0
334.0
334.0
291.7
400.0
400.0
400.0
400.0
High
Multiplication
Factor
1
CPU
2.5
2.5
5.5
4
5
4
5
3
3
4
5
6
4
5
6
5
Freescale Semiconductor
150.0
166.7
150.0
150.0
150.0
150.0
150.0
150.0
200.0
250.0
300.0
150.0
166.7
183.3
200.0
Low
CPU Clock
(MHz)
533.3
666.7
400.0
500.0
417.5
501.0
400.0
480.0
668.0
835.0
875.0
533.3
666.7
733.3
800.0
High

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