MPC8270VVUPEA Freescale Semiconductor, MPC8270VVUPEA Datasheet - Page 34

IC MPU POWERQUICC II 480-TBGA

MPC8270VVUPEA

Manufacturer Part Number
MPC8270VVUPEA
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8270VVUPEA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
450MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
450 MHz
Operating Supply Voltage
0 V to 3 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Program Memory Size
16 KB
Program Memory Type
EPROM/Flash
Core Size
32 Bit
Cpu Speed
450MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
1
2
3
4
5
6
Clock Configuration Modes
7.3 PCI Agent Mode
Table 19
illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not
exceed the frequency rating of the user’s device. In addition, note the following:
34
MODCK[1-3]
guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only.
Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of
the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For
modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices and
175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev0.1 the minimum CPU
frequency is 250 MHz; for RevA or later the minimum CPU frequency is 150 MHz for commercial temperature devices and 175
MHz for extended temperature devices.
MODCK_H-
The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry
As
MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
60x and local bus frequency. Identical to CLKIN.
CPM multiplication factor = CPM clock/bus clock
CPU multiplication factor = Core PLL multiplication factor
1100_000
1100_001
1100_010
1110_010
1110_011
1110_100
Mode
Table 15
and
3
Table 18. Clock Configurations for PCI Host Mode (PCI_MODCK=1)
Table 20
shows, PCI_MODCK determines the PCI clock frequency range. Refer to
In PCI mode only, PCI_MODCK comes from the LGPL5 pin and
MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.
The minimum Tval = 2 ns when PCI_MODCK = 1, and the minimum Tval = 1 ns
when PCI_MODCK = 0. Therefore, designers should use clock configurations that
fit this condition to achieve PCI-compliant AC timing.
Bus Clock
Low
50.0
50.0
50.0
(MHz)
show configurations for PCI agent mode. The frequencies listed are for the purpose of
100.0
100.0
100.0
High
MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8
4
Multiplication
Factor
CPM
3
3
3
5
NOTE: Tval (Output Hold)
NOTE: PCI_MODCK
150.0 300.0
150.0 300.0
150.0 300.0
CPM Clock
Low
(MHz)
High
Multiplication
Reserved
Reserved
Reserved
Factor
CPU
4.5
5.5
5
6
225.0 450.0
250.0 500.0
275.0 550.0
CPU Clock
Low
(MHz)
Table 17
High
1, 2
for higher configurations.
(continued)
Division
Freescale Semiconductor
Factor
PCI
6
6
6
Low High
25.0 50.0
25.0 50.0
25.0 50.0
PCI Clock
(MHz)

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