MPC8270VVUPEA Freescale Semiconductor, MPC8270VVUPEA Datasheet - Page 26

IC MPU POWERQUICC II 480-TBGA

MPC8270VVUPEA

Manufacturer Part Number
MPC8270VVUPEA
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8270VVUPEA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
450MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
450 MHz
Operating Supply Voltage
0 V to 3 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Program Memory Size
16 KB
Program Memory Type
EPROM/Flash
Core Size
32 Bit
Cpu Speed
450MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
Clock Configuration Modes
26
1
2
3
4
5
MODCK_H-MODCK[1:3]
guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only.
Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of
the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For
modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev0.1 the minimum
CPU frequency is 250 MHz; for RevA or later the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices.
The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry
MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
60x and local bus frequency. Identical to CLKIN.
CPM multiplication factor = CPM clock/bus clock
CPU multiplication factor = Core PLL multiplication factor
1000_000
1000_001
1000_010
1000_100
1000_101
0111_001
0111_010
0111_011
0111_100
0111_101
0111_110
1000_011
1000_110
1100_000
1100_001
1100_010
1101_000
0111_111
Mode
2
Table 16. Clock Configurations for Local Bus Mode
MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8
Low
50.0
42.9
37.5
33.3
42.9
37.5
33.3
30.0
28.6
Bus Clock
(MHz)
133.3
133.3
133.3
133.3
114.3
114.3
114.3
114.3
114.3
High
3
Multiplication
Factor
CPM
3.5
3.5
3.5
3.5
3.5
3
3
3
3
4
150.0
128.6
112.5
100.0
150.0
131.3
116.7
105.0
100.0
Low
CPM Clock
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(MHz)
400.0
400.0
400.0
400.0
400.0
400.0
400.0
400.0
400.0
High
1
(continued)
Multiplication
Factor
CPU
3.5
4.5
3.5
4.5
5.5
3
4
4
5
5
Freescale Semiconductor
150.0
150.0
150.0
150.0
150.0
150.0
150.0
150.0
150.0
Low
CPU Clock
(MHz)
400.0
466.7
533.3
600.0
400.0
457.1
514.3
571.4
628.6
High

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