Z8018008FSG Zilog, Z8018008FSG Datasheet - Page 79

IC 8MHZ Z180 CMOS ENH MPU 80-QFP

Z8018008FSG

Manufacturer Part Number
Z8018008FSG
Description
IC 8MHZ Z180 CMOS ENH MPU 80-QFP
Manufacturer
Zilog
Datasheet

Specifications of Z8018008FSG

Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
8MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
80-BQFP
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3882
Z8018008FSG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8018008FSG
Manufacturer:
Zilog
Quantity:
10 000
Operating Control OMCR: I/O Address = 3Eh)
PS014004-1106
A
0
–A
18
Control Register (OMCR) can be programmed to select between certain differences between
the Z80 and the 64180.
M1E (M1 Enable)—This bit controls the
during reset.
When
acknowledge cycle, and the first machine cycle of the
On the Z80180, this choice makes the processor fetch a
when fetching a
are not fully Z80-timing compatible, but are compatible with the on-chip CTCs.
When
fetching a
instruction using fully Z80-compatible cycles that include driving
some external Z80 peripherals may require properly decoded
MREQ
D
(A
0
–D
Figure 76. Operating Control Register (OMCR: I/O Address = 3Eh
RD
M1
19
ST
φ
)
7
M1E = 1
MIE = 0
T
1
RETI
Figure 77. RETI Instruction Sequence with MIE=0
T
D7
2
, the processor does not drive
, the
PC
EDh
instruction one time only with normal timing, the processor refetches the
RETI
T
D6 D5 —
3
M1
T
1
from zero-wait-state memory, uses three clock machine cycles which
output is asserted Low during the opcode fetch cycle, the
T
2
4Dh
T
— — — —
3
PC+1
T
I
T
I
T
I
M1
M1
T
Reserved
IOC (R/W)
1
M1TE (W)
M1E (R/W)
output and is set to a
Low during instruction fetch cycles. After
T
2
EDh
T
PC
NMI
3
RETI
T
acknowledge.
I
instruction one time only, and
RETI
T
1
M1
T
2
instruction.
Microprocessor Unit
1
PC+1
4Dh
Low. As a result,
T
3
T
I
Architecture
INT0
Z80180
73

Related parts for Z8018008FSG