MC68MH360EM25L Freescale Semiconductor, MC68MH360EM25L Datasheet - Page 73

• Manufacturer Part Number: MC68MH360EM25L
• Description: IC MPU QUICC ETHER 25MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

MOTOROLA
REGB + 515
REGB + 516
REGB + 517
REGB + 518
REGB + 519
REGB + 51C
REGB + 51D
REGB + 51E
REGB + 520
REGB + 524
REGB + 526
REGB + 528
REGB + 52C
REGB + 530
REGB + 534
REGB + 535
REGB + 536
REGB + 537
REGB + 538
REGB + 539
to
REGB + 53F
REGB + 540
REGB + 544
REGB + 548
REGB + 54C
REGB + 550
REGB + 552
REGB + 554
REGB + 556
REGB + 558
to
REGB + 55f
REGB + 560
REGB + 562
REGB + 564
REGB + 566
REGB + 568
REGB + 56a
to
REGB + 57f
REGB + 580
CMAR1
CMAR2
PAODR
PAPAR
PCPAR
PCDAT
SAPR2
DAPR2
PADAT
PCDIR
PADIR
PCINT
SDCR
CMR2
PCSO
TGCR
CSR1
SDSR
SDAR
BCR2
CSR2
FCR2
CIMR
CICR
CIPR
CISR
Table 3-4. QUICC CPM Registers Memory Map
Freescale Semiconductor, Inc.
For More Information On This Product,
24
16
32
16
16
32
32
32
24
32
32
32
16
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
Reserved
Channel Mask Register
Reserved
IDMA1 Channel Status Register
Reserved
SDMA Status Register
Reserved
SDMA Configuration Register
SDMA Address Register
Reserved
IDMA2 Mode Register
IDMA2 Source Address Pointer
IDMA2 Destination Address Pointer
IDMA2 Byte Count Register
IDMA2 Function Code Register
Reserved
Channel Mask Register
Reserved
IDMA2 Channel Status Register
Reserved
CP Interrupt Configuration Register
CP Interrupt Pending Register
CP Interrupt Mask Register
CP In-Service Register
Port A Data Direction Register
Port A Pin Assignment Register
Port A Open Drain Register
Port A Data Register
Reserved
Port C Data Direction Register
Port C Pin Assignment Register
Port C Special Options
Port C Data Register
Port C Interrupt Control Register
Reserved
Timer Global Configuration Register
MC68360 USER’S MANUAL
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00
00
00
0000
XXXX XXXX
0000
0000 0000
0000 0000
0000 0000
00
00
00
xx00 0000
0000 0000
0000 0000
0000 0000
0000
0000
0000
XXXX
0000
0000
0000
XXXX
0000
0000
QUICC Memory Map
H
H
H
H
H
H
H
H
H
H
Parallel
IDMA2
TIMER
SDMA
CPIC
I/O
3-7