MK60DX256ZVLL10 Freescale Semiconductor, MK60DX256ZVLL10 Datasheet - Page 24

KINETIS 256KFLEX ENET

MK60DX256ZVLL10

Manufacturer Part Number
MK60DX256ZVLL10
Description
KINETIS 256KFLEX ENET
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MK60DX256ZVLL10

Processor Series
K60
Core
ARM Cortex M4
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
128 KB
Interface Type
USB, CAN, SPI, I2C, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
2
Number Of Timers
2
Operating Supply Voltage
1.71 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
LQFP-100
Operating Temperature Range
- 40 C to + 105 C
Processor To Be Evaluated
MK60DX256ZVLL10
Supply Current (max)
185 mA
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK60DX256ZVLL10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Peripheral operating requirements and behaviors
1.
2.
3.
4.
6 Peripheral operating requirements and behaviors
All digital I/O switching characteristics assume:
6.1 Core modules
6.1.1 Debug trace timing specifications
24
Board type
1. output pins
2. input pins
Symbol
T
T
T
T
T
cyc
wh
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method
Environmental Conditions—Forced Convection (Moving Air).
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
wl
r
f
• have C
• are configured for fast slew rate (PORTx_PCRn[SRE]=0), and
• are configured for high drive strength (PORTx_PCRn[DSE]=1)
• have their passive filter disabled (PORTx_PCRn[PFE]=0)
Clock period
Low pulse width
High pulse width
Clock and data rise time
Clock and data fall time
Description
L
Ψ
Symbol
=30pF loads,
JT
K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Table 12. Debug trace operating behaviors
Thermal
characterization
parameter, junction
to package top
outside center
(natural
convection)
Description
Table continues on the next page...
Preliminary
TBD
100 LQFP
Frequency dependent
Min.
°C/W
Unit
2
2
Freescale Semiconductor, Inc.
Max.
3
3
4
Notes
MHz
Unit
ns
ns
ns
ns

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