MK60DX256ZVLL10 Freescale Semiconductor, MK60DX256ZVLL10 Datasheet - Page 44

• Manufacturer Part Number: MK60DX256ZVLL10
• Description: KINETIS 256KFLEX ENET
• Manufacturer: Freescale Semiconductor

Specifications of MK60DX256ZVLL10

• Processor Series: K60
• Core: ARM Cortex M4
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 128 KB
• Interface Type: USB, CAN, SPI, I2C, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 2
• Number Of Timers: 2
• Operating Supply Voltage: 1.71 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-100
• Operating Temperature Range: - 40 C to + 105 C
• Processor To Be Evaluated: MK60DX256ZVLL10
• Supply Current (max): 185 mA
• Lead Free Status / Rohs Status: Details

Peripheral operating requirements and behaviors
1. Typical values assume V
2. DC potential difference.
3. This resistance is external to MCU. The analog source resistance should be kept as low as possible in order to achieve the
4. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
5. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
6. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
44
Symbol
reference only and are not tested in production.
best results. The results in this datasheet were derived from a system which has <8 Ω analog source resistance. The R
C
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
C
C
AS
rate
rate
time constant should be kept to <1ns.
AS
ADC conversion
rate
ADC conversion
rate
Description
Table 27. 16-bit ADC operating conditions (continued)
Figure 13. ADC input impedance equivalency diagram
AS
DDA
K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
≤ 13 bit modes
No ADC hardware
averaging
Continuous
conversions enabled,
subsequent conversion
time
16 bit modes
No ADC hardware
averaging
Continuous
conversions enabled,
subsequent conversion
time
Conditions
= 3.0 V, Temp = 25°C, f
AS
AS
ADIN
Preliminary
ADCK
20.000
37.037
Min.
= 1.0 MHz unless otherwise stated. Typical values are for
Typ.
—
—
1
ADIN
818.330
461.467
Max.
ADIN
ADIN
ADIN
ADIN
Freescale Semiconductor, Inc.
Ksps
Ksps
Unit
ADIN
Notes
6
7
AS
/