MK60DX256ZVLL10 Freescale Semiconductor, MK60DX256ZVLL10 Datasheet - Page 49

KINETIS 256KFLEX ENET

MK60DX256ZVLL10

Manufacturer Part Number
MK60DX256ZVLL10
Description
KINETIS 256KFLEX ENET
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MK60DX256ZVLL10

Processor Series
K60
Core
ARM Cortex M4
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
128 KB
Interface Type
USB, CAN, SPI, I2C, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
2
Number Of Timers
2
Operating Supply Voltage
1.71 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
LQFP-100
Operating Temperature Range
- 40 C to + 105 C
Processor To Be Evaluated
MK60DX256ZVLL10
Supply Current (max)
185 mA
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK60DX256ZVLL10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. Typical values assume V
2. This current is a PGA module adder, in addition to and ADC conversion currents.
3. Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong
4. Gain = 2
5. After changing the PGA gain setting, a minimum of 2 ADC+PGA conversions should be ignored.
Freescale Semiconductor, Inc.
V
Symbol
SINAD
ENOB
SFDR
function of input common mode voltage (V
PP,DIFF
SNR
THD
E
IL
PGAG
Input leakage
error
Maximum
differential input
signal swing
Signal-to-noise
ratio
Total harmonic
distortion
Spurious free
dynamic range
Effective number
of bits
Signal-to-noise
plus distortion
ratio
Description
Table 30. 16-bit ADC with PGA characteristics (continued)
DDA
K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
=3.0V, Temp=25°C, f
All modes
See ENOB
Conditions
• Gain=1
• Gain=64
• Gain=1
• Gain=64
• Gain=1
• Gain=64
• Gain=1, Average=4
• Gain=1, Average=8
• Gain=64, Average=4
• Gain=64, Average=8
• Gain=1, Average=32
• Gain=2, Average=32
• Gain=4, Average=32
• Gain=8, Average=32
• Gain=16, Average=32
• Gain=32, Average=32
• Gain=64, Average=32
CM
) and the PGA gain.
ADCK
Preliminary
=6MHz unless otherwise stated.
where V
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Min.
6.02 × ENOB + 1.76
Peripheral operating requirements and behaviors
X
I
= V
In
Typ.
83.0
57.5
89.4
90.0
90.9
77.0
12.3
12.7
13.3
13.1
12.5
11.8
11.1
10.2
× R
8.4
8.7
9.3
REFPGA
1
AS
× 0.583
Max.
Unit
mV
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
dB
dB
dB
dB
dB
dB
dB
V
mode,f
MCU's voltage
Average=32,
Average=32,
I
Average=32
(refer to the
and current
In
differential
differential
differential
differential
f
f
operating
in
in
ratings)
= leakage
current
mode,
mode,
mode,
Notes
=500Hz
=500Hz
16-bit
16-bit
16-bit
16-bit
6
in
z
=100H
49

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