AD9979BCPZ Analog Devices Inc, AD9979BCPZ Datasheet - Page 21

• Manufacturer Part Number: AD9979BCPZ
• Description: IC PROCESSOR CCD 14BIT 48-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 14-Bitr

Specifications of AD9979BCPZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Current - Supply: 48mA
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Supply Voltage Range: 1.6V To 2V, 1.6V To 3.6V, 2.7V To 3.6V
• Operating Temperature Range: -25°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 48
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Ic Function: 14-bit CCD Signal Processor With Precision Timing Core
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

HBLK Mode 2 Operation
HBLK Mode 2 allows more advanced HBLK pattern operation.
If unevenly spaced, multiple areas of HCLK pulses are needed;
therefore, use HBLK Mode 2. Using a separate set of registers,
HBLK Mode 2 can divide the HBLK region into up to six
different repeat areas (see Table 11). As shown in Figure 28,
each repeat area shares a common group of toggle positions,
HBLKSTARTA, HBLKSTARTB, and HBLKSTARTC. However, the
number of toggles following each HBLKSTARTA, HBLKSTARTB,
and HBLKSTARTC position can be unique in each repeat area
by using RAxHyREPz, where x represents the repeat area, from 0
to 5, y represents the horizontal driver, 1 or 2, and z represents the
HBLK repeat area start position for HBLK Mode 2, A, B, or C.
As shown in Figure 29, setting the RAxH1REPA/RAxH1REPB/
RAxH1REPC or RAxH2REPA/RAxH2REPB/RAxH2REPC
registers to 0 masks the HCLK groups from appearing in a
particular repeat area. Figure 28 shows only two repeat areas
being used, although up to six are available. It is possible to
program a separate number of repeat area repetitions for H1
and H2, but generally, the same value is used for both H1 and H2.
HBLK
HD
H2
H1
HD
H2
H1
HBLKSTART
HBLKSTART
CREATE UP TO 3 GROUPS OF TOGGLES
A, B, C COMMON IN ALL REPEAT AREAS
RA0H2REPA RA0H2REPB
REPEAT AREA 0
RA0H1REPA RA0H1REPB
A
HBLKSTARTA
B
REPEAT AREA 0
C
HBLKSTARTB
REPEAT AREA 1
HBLKLEN
RA0H2REPC
RA0H1REPC
HBLKSTARTC
MASK A, B, C PULSES IN ANY REPEAT
TO CREATE 2 REPEAT AREAS
AREA BY SETTING RAxHyREPz = 0
REPEAT AREA 2
Figure 29. HBLK Mode 2 Operation
Figure 28. HBLK Mode 2 Registers
HBLKREP = 2
Rev. C | Page 21 of 56
RA1H2REPA RA1H2REPB
RA1H1REPA RA1H1REPB
ALL RAxHyREPz REGISTERS = 2, TO CREATE 2 HCLK PULSES
REPEAT AREA 3
Figure 28 shows the example
RA0H1REPA/RA0H1REPB/RA0H1REPC =
RA0H2REPA/RA0H2REPB/RA0H2REPC =
RA1H1REPA/RA1H1REPB/RA1H1REPC =
RA1H2REPA/RA1H2REPB/RA1H2REPC = 2.
Furthermore, HBLK Mode 2 allows a different HBLK pattern
on even and odd lines. HBLKSTARTA, HBLKSTARTB, and
HBLKSTARTC, as well as RAxH1REPA/RAxH1REPB/
RAxH1REPC and RAxH2REPA/RAxH2REPB/RAxH2REPC,
define operation for the even lines. For separate control of the
odd lines, the HBLKALT_PATx registers specify up to six repeat
areas on the odd lines by reordering the repeat areas used for the
even lines. New patterns are not available, but the order of the
previously defined repeat areas on the even lines can be changed
for the odd lines to accommodate advanced CCD operation.
REPEAT AREA 1
REPEAT AREA 4
REPEAT AREA USING RAxHyREPz REGISTERS
CHANGE NUMBER OF A, B, C PULSES IN ANY
RA1H2REPC
RA1H1REPC
REPEAT AREA 5
HBLKEND
HBLKEND
AD9979