AD9979BCPZ Analog Devices Inc, AD9979BCPZ Datasheet - Page 40

IC PROCESSOR CCD 14BIT 48-LFCSP

AD9979BCPZ

Manufacturer Part Number
AD9979BCPZ
Description
IC PROCESSOR CCD 14BIT 48-LFCSP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 14-Bitr
Datasheet

Specifications of AD9979BCPZ

Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Current - Supply
48mA
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Supply Voltage Range
1.6V To 2V, 1.6V To 3.6V, 2.7V To 3.6V
Operating Temperature Range
-25°C To +85°C
Digital Ic Case Style
LFCSP
No. Of Pins
48
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Ic Function
14-bit CCD Signal Processor With Precision Timing Core
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD9979
3-WIRE SERIAL INTERFACE TIMING
All of the internal registers of the AD9979 are accessed through a
3-wire serial interface. Each register consists of a 12-bit address
and a 28-bit data-word. Both the 12-bit address and the 28-bit
data-words are written starting with the LSB. To write to each
register, a 40-bit operation is required, as shown in Figure 56.
Although many registers are fewer than 28-bits wide, all 28 bits
must be written for each register. For example, if the register is only
20-bits wide, the upper 8 bits are don’t care bits and must be filled
with zeros during the serial write operation. If fewer than 28 data
bits are written, the register does not update with new data.
SDATA
SCK
SL
SDATA
NOTES:
1. MULTIPLE SEQUENTIAL REGISTERS MAY BE LOADED CONTINUOUSLY.
2. THE FIRST (LOWEST ADDRESS) REGISTER ADDRESS IS WRITTEN, FOLLOWED BY MULTIPLE 28-BIT DATA-WORDS.
3. THE ADDRESS AUTOMATICALLY INCREMENTS WITH EACH 28-BIT DATA-WORD (ALL 28 BITS MUST BE WRITTEN).
4. SL IS HELD LOW UNTIL THE LAST DESIRED REGISTER HAS BEEN LOADED.
SCK
SL
A0
NOTES:
1. SDATA BITS ARE LATCHED ON SCK RISING EDGES. SCK MAY IDLE HIGH OR LOW BETWEEN WRITE OPERATIONS.
2. ALL 40 BITS MUST BE WRITTEN: 12 BITS FOR ADDRESS AND 28 BITS FOR DATA.
3. IF THE REGISTER LENGTH IS <28 BITS, THEN ZEROS MUST BE USED TO COMPLETE THE 28-BIT DATA LENGTH.
4. NEW DATA VALUES ARE UPDATED IN THE SPECIFIED REGISTER LOCATION AT DIFFERENT TIMES, DEPENDING ON THE
1
PARTICULAR REGISTER WRITTEN TO. SEE THE UPDATING OF NEW REGISTER VALUES SECTION FOR MORE INFORMATION.
A0
A1
1
2
A1
A2
t
LS
2
3
A2
A3
3
4
A3
4
A4
5
t
DS
A10 A11
A5
11
6
Figure 57. Continuous Serial Write Operation
12-BIT ADDRESS
A6
12
7
A7
Figure 56. Serial Write Operation
D0
13
8
t
DATA FOR STARTING
REGISTER ADDRESS
A8
D1
DH
Rev. C | Page 40 of 56
14
9
A9
10
A10
11
D26
A11
Figure 57 shows a more efficient way to write to the registers,
using the AD9979 address auto-increment capability. Using this
method, the lowest desired address is written first, followed
by multiple 28-bit data-words. Each new 28-bit data-word is
automatically written to the next highest register address. By
eliminating the need to write to each 12-bit address, faster register
loading is achieved. Continuous write operations can be used
starting with any register location.
12
39
D27
D0
13
40
D1
D0
14
41
REGISTER ADDRESS
D2
D1
15
42
DATA FOR NEXT
D3
28-BIT DATA
16
D26
67
D25
D27
38
68
D26
t
D0
LH
69
39
D27
D1
70
40
D2
71

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