AD9979BCPZ Analog Devices Inc, AD9979BCPZ Datasheet - Page 6

• Manufacturer Part Number: AD9979BCPZ
• Description: IC PROCESSOR CCD 14BIT 48-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 14-Bitr

Specifications of AD9979BCPZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Current - Supply: 48mA
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Supply Voltage Range: 1.6V To 2V, 1.6V To 3.6V, 2.7V To 3.6V
• Operating Temperature Range: -25°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 48
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Ic Function: 14-bit CCD Signal Processor With Precision Timing Core
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9979
ANALOG SPECIFICATIONS
AVDD = 1.8 V, f
Table 4.
Parameter
CDS
VARIABLE GAIN AMPLIFIER (VGA)
BLACK LEVEL CLAMP
ANALOG-TO-DIGITAL CONVERTER (ADC)
VOLTAGE REFERENCE
SYSTEM PERFORMANCE
1
Input signal characteristics are defined as shown in Figure 2.
CDS Gain Accuracy
Maximum Input Voltage
Allowable Optical Black Pixel Amplitude
Low Gain Setting
Maximum Gain Setting
Minimum Clamp Level (Code 0)
Resolution
Differential Nonlinearity (DNL)
No Missing Codes
Integral Nonlinearity (INL)
Full-Scale Input Voltage
VGA Gain Accuracy
Peak Nonlinearity, 500 mV Input Signal
Total Output Noise
Power Supply Rejection (PSR)
Allowable CCD Reset Transient
Gain Control Resolution
Gain Monotonicity
Clamp Level Resolution
Reference Top Voltage (REFT)
Reference Bottom Voltage (REFB)
Maximum Clamp Level (Code 1023)
1
−3.0 dB CDS Gain
0 dB CDS Gain (Default)
+3 dB CDS Gain
+6 dB CDS Gain
−3 dB CDS Gain
0 dB CDS Gain (Default)
+3 dB CDS Gain
+6 dB CDS Gain
0 dB CDS Gain (Default)
+6 dB CDS Gain
Low Gain (Code 15)
Maximum Gain (Code 1023)
CLI
= 65 MHz, typical timing specifications, t
RESET TRANSIENT
500mV TYP
Min
–3.7
–0.9
+1.9
+4.3
–100
–50
14
–1.0
5.1
41.3
800mV
MAXIMUM
OPTICAL BLACK PIXEL
200mV MAX
Figure 2. Input Signal Characteristics
Typ
0.5
–3.2
–0.4
+2.4
+4.8
1.4
1.0
0.7
0.5
1024
Guaranteed
6
42
1024
0
1023
± 0.5
Guaranteed
5
2.0
1.4
0.4
5.6
41.8
0.1
2
45
MIN
Rev. C | Page 6 of 56
to t
MAX
, unless otherwise noted.
Max
0.8
–2.7
+0.1
+2.9
+5.3
+200
+100
+1.2
16
6.1
42.3
0.4
1V MAXIMUM INPUT
SIGNAL RANGE
(0dB CDS GAIN)
0V (AVSS)
MAXIMUM INPUT LIMIT =
LESSER OF 2.2V
OR (AVDD + 0.3V)
+1.8V TYP (AVDD)
+1.3V TYP (AVDD – 0.5V)
DC RESTORE VOLTAGE
MINIMUM INPUT LIMIT
(AVSS – 0.3V)
Unit
V
dB
dB
dB
dB
V p-p
V p-p
V p-p
V p-p
mV
mV
Steps
dB
dB
Steps
LSB
LSB
Bits
LSB
LSB
V
V
V
dB
dB
%
LSB rms
dB
Test Conditions/Comments
VGA gain = 6.3 dB, Code 15 (default value)
VGA Code 15 (default)
VGA Code 1023
Measured at ADC output
Specifications include entire signal chain
0 dB CDS gain (default)
Gain = (0.0359 × code) + 5.1 dB
12 dB total gain applied
AC grounded input, 6 dB gain applied
Measured with step change on supply
Measured at ADC output