AD9898KCP-20 Analog Devices Inc, AD9898KCP-20 Datasheet - Page 27

• Manufacturer Part Number: AD9898KCP-20
• Description: IC CCD SIGNAL PROC/GEN 48-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 10-Bitr

Specifications of AD9898KCP-20

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LFCSP EP
• Number Of Channels: 3
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

H1 AND H2 BLANKING
The AD9898 provides three options for controlling the period
where H1 and H2 pulses get blanked. These options are normal
H blanking, selective positioning for 2 H1 and H2 outputs, and
extended blanking. In all cases, HBLKMASK is used to set the
polarity of H1 during the blanking period. Table XIV describes
the registers used to control H blanking.
Normal H Blanking
For normal H blanking operation, HPULSECNT = 0 and
BLKMASK = 0 or 1. The HBLKHPOS register is not used in
this mode. Figure 23 shows one example where HBLKMASK = 0.
As seen in Figure 23, H1 and H2 are blanked while HD is Low.
Register
Name
HBLKMASK
HPULSECNT
HBLKEXT
H1BLKRETIME
HBLKHPOS
NOTES
1
2
REV. 0
The polarity of H2 is always the opposite polarity of the H1 polarity.
The HBLKEXT extend control extends the blanking period by the number of counts set in the BLLEN register for the 9-bit BL counter.
(INTERNAL)
HBLK
Figure 23. Normal H-Blanking Operation HBLKMASK = 0, HPULSECNT = 0, HBLKHPOS = xxx
HD
RG
H1
H2
1. THE RISING EDGE OF HBLK IS ALWAYS THE SAME AS HDRISE.
Bit
Width
1
1
1
1
10
Register Type
Control (0x01)
Control (0x0A)
Control (0x0A)
Control (0x03)
Sys_Reg(11)
Table XIV. H1 Blanking Registers
Description
Masking Polarity for H1 during Blanking Period
H Pulse Control during Blanking Period
(0 = No Output during Blanking, 1 = Output during Blanking)
H Pulse Blanking Extend Control
(0 = Extended Blanking Disabled, 1 = Extended Blanking Enabled)
Retimes the H1 HBLK to Internal Clock
(0 = Retiming Disabled, 1 = Retiming Enabled)
H1 Pulse ON Position during Blanking Period
–27–
Selective Positioning for Two H1 and H2 Outputs
For selective positioning operation, HPULSECNT = 1 and
HBLKMASK = 0 or 1. In this mode, two H1 pulses are output
during the blanking period. The location of these two pulses are
set using the HBLKHPOS register, as shown in Figure 24.
Extended Blanking
Extended blanking is enabled by setting HBLKEXT = 1. The
HBLKEXT register uses the 9-bit BL counter to suspend operation
of the HD and HL counters. This delays the blanking period by
the length set in the BLLEN register as shown in Figure 25.
1
HDRISE
2
1
(0 = Low, 1 = High)
AD9898