M95M02-DRMN6TP STMicroelectronics, M95M02-DRMN6TP Datasheet - Page 20

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M95M02-DRMN6TP

Manufacturer Part Number
M95M02-DRMN6TP
Description
IC EEPROM SPI BUS 2MB 8SOIC
Manufacturer
STMicroelectronics
Series
-r
Datasheets

Specifications of M95M02-DRMN6TP

Mfg Application Notes
Make the Most of Serial EEPROMs AppNote
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2M (256K x 8)
Speed
5MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11405-2

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Instructions
20/40
Figure 10. Write Status Register (WRSR) sequence
Table 5.
1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in
The Write Status Register (WRSR) instruction allows the user to change the values of the
Block Protect (BP1, BP0) bits, to define the size of the area that is to be treated as read-
only, as defined in
The Write Status Register (WRSR) instruction also allows the user to set or reset the Status
Register Write Disable (SRWD) bit in accordance with the Write Protect (W) signal. The
Status Register Write Disable (SRWD) bit and Write Protect (W) signal allow the device to
be put in the Hardware Protected Mode (HPM). The Write Status Register (WRSR)
instruction is not executed once the Hardware Protected Mode (HPM) is entered.
The contents of the Status Register Write Disable (SRWD) and Block Protect (BP1, BP0)
bits are frozen at their current values from just before the start of the execution of Write
Status Register (WRSR) instruction. The new, updated, values take effect at the moment of
completion of the execution of Write Status Register (WRSR) instruction.
The protection features of the device are summarized in
Signal
W
1
0
1
0
SRWD
S
C
D
Q
Bit
0
0
1
1
Protection modes
Protected
Hardware
Protected
Software
(SPM)
(HPM)
Mode
Table
0
4.
1
High Impedance
Status Register is Writable
(if the WREN instruction
has set the WEL bit)
The values in the BP1 and
BP0 bits can be changed
Status Register is
Hardware write protected
The values in the BP1 and
BP0 bits cannot be
changed
Write Protection of the
2
Instruction
Doc ID 18203 Rev 4
Status Register
3
4
5
6
7
MSB
7
8
6
9 10 11 12 13 14 15
5
Write Protected
Write Protected
Register In
Protected area
4
Status
Table
3
2
2.
1
Memory content
0
(1)
AI02282D
Unprotected area
Ready to accept
Write instructions
Ready to accept
Write instructions
M95M02-DR
Table
5.
(1)

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