M95M02-DRMN6TP STMicroelectronics, M95M02-DRMN6TP Datasheet - Page 23

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M95M02-DRMN6TP

Manufacturer Part Number
M95M02-DRMN6TP
Description
IC EEPROM SPI BUS 2MB 8SOIC
Manufacturer
STMicroelectronics
Series
-r
Datasheets

Specifications of M95M02-DRMN6TP

Mfg Application Notes
Make the Most of Serial EEPROMs AppNote
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2M (256K x 8)
Speed
5MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11405-2

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M95M02-DR
6.6
Note:
Figure 12. Read Identification Page sequence
Read Identification Page
The Identification Page (256 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode.
Reading this page is achieved with the Read Identification Page instruction (see
The Chip Select signal (S) is first driven low, the bits of the instruction byte and address
bytes are then shifted in, on Serial Data input (D). Address bit A10 must be 0, address bits
[A17:A11] and [A9:A8] are Don't Care, and the data byte pointed to by [A7:A0] is shifted out
on Serial Data output (Q).
If Chip Select (S) continues to be driven low, the internal address register is automatically
incremented, and the byte of data at the new address is shifted out.
The number of bytes to read from the ID page must not exceed the page boundary (e.g.:
when reading the ID page from location 100d, the number of bytes should be less than or
equal to 156d, as the ID page is 256 bytes wide).
The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle. The first byte addressed can be any
byte within any page.
The instruction is not accepted, and is not executed, if a write cycle is currently in progress.
Doc ID 18203 Rev 4
Instructions
Table
3).
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