LFE3-95EA-8FN672I Lattice, LFE3-95EA-8FN672I Datasheet - Page 62

• Manufacturer Part Number: LFE3-95EA-8FN672I
• Description: IC FPGA 92KLUTS 380I/O 672-BGA
• Manufacturer: Lattice

Specifications of LFE3-95EA-8FN672I

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
LVDS25E
The top and bottom sides of LatticeECP3 devices support LVDS outputs via emulated complementary LVCMOS
outputs in conjunction with a parallel resistor across the driver outputs. The scheme shown in Figure 3-1 is one
possible solution for point-to-point signals.
Figure 3-1. LVDS25E Output Termination Example
Table 3-1. LVDS25E DC Conditions
LVCMOS33D
All I/O banks support emulated differential I/O using the LVCMOS33D I/O type. This option, along with the external
resistor network, provides the system designer the flexibility to place differential outputs on an I/O bank with 3.3V
V
4mA, 8mA, 16mA or 20mA. Follow the LVCMOS33 specifications for the DC characteristics of the LVCMOS33D.
CCIO
. The default drive current for LVCMOS33D output is 12mA with the option to change the device strength to
VCCIO = 2.5V (±5%)
VCCIO = 2.5V (±5%)
V
Z
R
R
R
V
V
V
V
Z
I
DC
Parameter
OUT
OH
OL
OD
BACK
CCIO
T
CM
S
P
8 mA
8 mA
ON-chip
Output Driver Supply (+/-5%)
Driver Impedance
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage
Output Low Voltage
Output Differential Voltage
Output Common Mode Voltage
Back Impedance
DC Output Current
OFF-chip
RS=158 ohms
(±1%)
RS=158 ohms
(±1%)
Transmission line, Zo = 100 ohm differential
Description
RP = 140 ohms
(±1%)
3-9
Typical
DC and Switching Characteristics
RT = 100 ohms
(±1%)
100.5
2.50
1.43
1.07
0.35
1.25
6.03
158
140
100
20
LatticeECP3 Family Data Sheet
OFF-chip ON-chip
Units
mA
V




V
V
V
V

+
-