LFE3-95EA-8FN672I Lattice, LFE3-95EA-8FN672I Datasheet - Page 75

• Manufacturer Part Number: LFE3-95EA-8FN672I
• Description: IC FPGA 92KLUTS 380I/O 672-BGA
• Manufacturer: Lattice

Specifications of LFE3-95EA-8FN672I

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
LatticeECP3 External Switching Characteristics (Continued)
Generic DDRX1 Output with Clock and Data (<10 Bits Wide) Centered at Pin (GDDRX1_TX.DQS.Centered)
Left and Right Sides
t
t
f
t
t
f
t
t
f
t
t
f
Generic DDRX2 Output with Clock and Data (>10 Bits Wide) Aligned at Pin (GDDRX2_TX.Aligned)
Left and Right Sides
t
t
f
Generic DDRX2 Output with Clock and Data (>10 Bits Wide) Centered at Pin Using DQSDLL (GDDRX2_TX.DQS-
DLL.Centered)
Left and Right Sides
t
t
f
Generic DDRX2 Output with Clock and Data (>10 Bits Wide) Centered at Pin Using PLL (GDDRX2_TX.PLL.Centered)
Left and Right Sides
t
t
f
Memory Interface
DDR/DDR2 I/O Pin Parameters (Input Data are Strobe Edge Aligned, Output Strobe Edge is Data Centered)
t
t
t
t
f
f
DDR3 (Using PLL for SCLK) I/O Pin Parameters
t
t
t
DVBGDDR
DVAGDDR
MAX_GDDR
DVBGDDR
DVAGDDR
MAX_GDDR
DVBGDDR
DVAGDDR
MAX_GDDR
DVBGDDR
DVAGDDR
MAX_GDDR
DIBGDDR
DIAGDDR
MAX_GDDR
DVBGDDR
DVAGDDR
MAX_GDDR
DVBGDDR
DVAGDDR
MAX_GDDR
DVADQ
DVEDQ
DQVBS
DQVAS
MAX_DDR
MAX_DDR2
DVADQ
DVEDQ
DQVBS
Parameter
11
Data Valid Before CLK
Data Valid After CLK
DDRX1 Clock Frequency
Data Valid Before CLK
Data Valid After CLK
DDRX1 Clock Frequency
Data Valid Before CLK
Data Valid After CLK
DDRX1 Clock Frequency
Data Valid Before CLK
Data Valid After CLK
DDRX1 Clock Frequency
Data Invalid Before Clock
Data Invalid After Clock
DDRX2 Clock Frequency
Data Valid Before CLK
Data Valid After CLK
DDRX2 Clock Frequency
Data Valid Before CLK
Data Valid After CLK
DDRX2 Clock Frequency
Data Valid After DQS (DDR Read)
Data Hold After DQS (DDR Read)
Data Valid Before DQS
Data Valid After DQS
DDR Clock Frequency
DDR2 clock frequency
Data Valid After DQS (DDR Read)
Data Hold After DQS (DDR Read)
Data Valid Before DQS
Over Recommended Commercial Operating Conditions
Description
ECP3-150EA
ECP3-150EA
ECP3-150EA
ECP3-70EA/95EA
ECP3-70EA/95EA
ECP3-70EA/95EA
ECP3-35EA
ECP3-35EA
ECP3-35EA
ECP3-17EA
ECP3-17EA
ECP3-17EA
All ECP3EA Devices
All ECP3EA Devices
All ECP3EA Devices
All ECP3EA Devices 400
All ECP3EA Devices 400
All ECP3EA Devices
All ECP3EA Devices 285
All ECP3EA Devices 285
All ECP3EA Devices
All ECP3 Devices
All ECP3 Devices
All ECP3 Devices
All ECP3 Devices
All ECP3 Devices
All ECP3 Devices
All ECP3 Devices
All ECP3 Devices
All ECP3 Devices
3-22
Device
DC and Switching Characteristics
Min. Max. Min. Max. Min. Max.
0.64
0.25
0.25
0.64
0.25
670
670
657
657
670
670
670
670
125
95
—
—
—
—
—
—
—
—
—
—
—
LatticeECP3 Family Data Sheet
-8
0.225
0.225
250
250
250
250
200
200
500
400
500
200
266
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.64
0.25
0.25
0.64
0.25
670
670
652
652
675
675
670
670
400
400
370
370
125
95
—
—
—
—
—
—
—
—
—
—
—
-7
0.225
0.225
1, 2
250
250
250
250
210
210
420
400
420
200
200
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.64
0.25
0.25
0.64
0.25
670
670
650
650
676
676
670
670
431
432
431
432
125
95
—
—
—
—
—
—
—
—
—
—
—
-6
10
0.225
0.225
4
250
250
250
250
220
220
375
375
375
166
166
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
UI
UI
UI
UI
UI
UI
UI
10