ATtiny28L Atmel Corporation, ATtiny28L Datasheet - Page 39

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ATtiny28L

Manufacturer Part Number
ATtiny28L
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny28L

Flash (kbytes)
2 Kbytes
Pin Count
28
Max. Operating Frequency
4 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
11
Ext Interrupts
10
Usb Speed
No
Usb Interface
No
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.03
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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Hardware Modulator
1062F–AVR–07/06
ATtiny28 features a built-in hardware modulator connected to a high-current output pad,
PA2. The hardware modulator generates a configurable pulse train. The on-time of a
pulse can be set to a number of chip clock cycles. This is done by configuring the Modu-
lation Control Register (MODCR).
PA2 is the built-in, high-current LED driver and it is always an output pin. The output
buffer can sink 25 mA at V
and the pin acts as a normal high-current output pin. The following truth table shows the
effect of various PORTA2 and MCONF settings.
Table 16. PA2 Output
The modulation period is available as a prescale to Timer/Counter0 and thus, this timer
should be used to time the length of each burst. If the number of pulses to be sent is N,
the number 255 - N should be loaded to the timer. When an overflow occurs, the trans-
mission is complete.The OOM01 and OOM00 bits in TCCR0 can be configured to
automatically change the value on PA2 when a Timer/Counter0 overflow occurs. See
“Timer/Counter0” on page 34 for details on how to configure the OOM01 and OOM00
bits.
The modulation period is available as a prescale even when PORTA2 is high and mod-
ulation is stopped. Thus, this prescale can also be used to time the intervals between
bursts.
To get a glitch-free output, the user should first configure the MODCR register to enable
modulation. There are two ways to start the modulation:
1. Clear the PORTA2 bit in Port A Data Register (PORTA).
2. Configure OOM00 and OOM01 bits in the Timer/Counter0 Control Register
The PA2 output will then be set low at the start of the next cycle. To stop the modulated
output, the user should set the PORTA2 bit or configure OOM00 and OOM01 to set PA2
on the next overflow. If the MODCR register is changed during modulation, the changed
value will take effect at the start of the next cycle, producing a glitch-free output. See
Figure 31 below and Figure 22 on page 26.
PORTA2
0
0
1
(TCCR0) to clear PA2 on the next overflow. Either an overflow or a forced over-
flow can then be used to start modulation.
CC
MCONF
0
1 - 7
X
= 2.0V. When MCONF is zero, modulation is switched off
PA2 Output
0
Modulated
1
ATtiny28L/V
39

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