LM3S308 Luminary Micro, Inc, LM3S308 Datasheet - Page 36

• Manufacturer Part Number: LM3S308
• Description: Lm3s308 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

ARM Cortex-M3 Processor Core
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Writing to the Current Value register clears the register and the COUNTFLAG status bit. The write
does not trigger the SysTick exception logic. On a read, the current value is the value of the register
at the time the register is accessed.
If the core is in debug state (halted), the counter will not decrement. The timer is clocked with respect
to a reference clock. The reference clock can be the core clock or an external clock source.
SysTick Control and Status Register
Use the SysTick Control and Status Register to enable the SysTick features. The reset is
0x0000.0000.
SysTick Reload Value Register
Use the SysTick Reload Value Register to specify the start value to load into the current value
register when the counter reaches 0. It can be any value between 1 and 0x00FF.FFFF. A start value
Bit/Field
31:17
15:3
16
2
1
0
COUNTFLAG
CLKSOURCE
reserved
reserved
TICKINT
ENABLE
Name
Type
R/W
R/W
R/W
R/W
RO
RO
Reset
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide compatibility with
future products, the value of a reserved bit should be preserved across a
read-modify-write operation.
Count Flag
Returns 1 if timer counted to 0 since last time this was read. Clears on read by
application. If read by the debugger using the DAP, this bit is cleared on read-only
if the MasterType bit in the AHB-AP Control Register is set to 0. Otherwise, the
COUNTFLAG bit is not changed by the debugger read.
Software should not rely on the value of a reserved bit. To provide compatibility with
future products, the value of a reserved bit should be preserved across a
read-modify-write operation.
Clock Source
If no reference clock is provided, it is held at 1 and so gives the same time as the
core clock. The core clock must be at least 2.5 times faster than the reference clock.
If it is not, the count values are unpredictable.
Tick Interrupt
Enable
Value
0
1
Value
0
1
Value
0
1
Preliminary
Description
External reference clock. (Not implemented for Stellaris microcontrollers.)
Core clock
Description
Counting down to 0 does not generate the interrupt request to the NVIC.
Software can use the COUNTFLAG to determine if ever counted to 0.
Counting down to 0 pends the SysTick handler.
Description
Counter disabled.
Counter operates in a multi-shot way. That is, counter loads with the Reload
value and then begins counting down. On reaching 0, it sets the
COUNTFLAG to 1 and optionally pends the SysTick handler, based on
TICKINT. It then loads the Reload value again, and begins counting.
June 04, 2008