LM3S308 Luminary Micro, Inc, LM3S308 Datasheet - Page 66

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LM3S308

Manufacturer Part Number
LM3S308
Description
Lm3s308 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
System Control
Interrupt Mask Control (IMC)
Base 0x400F.E000
Offset 0x054
Type R/W, reset 0x0000.0000
66
Bit/Field
31:7
RO
RO
6
5
4
3
2
1
31
15
0
0
RO
RO
Register 5: Interrupt Mask Control (IMC), offset 0x054
Central location for system control interrupt masks.
30
14
0
0
RO
RO
29
13
reserved
0
0
PLLLIM
MOFIM
BORIM
LDOIM
Name
IOFIM
CLIM
RO
RO
28
12
0
0
reserved
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
26
10
0
0
RO
RO
Reset
25
0
9
0
0
0
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PLL Lock Interrupt Mask
This bit specifies whether a current limit detection is promoted to a
controller interrupt. If set, an interrupt is generated if PLLLRIS in RIS
is set; otherwise, an interrupt is not generated.
Current Limit Interrupt Mask
This bit specifies whether a current limit detection is promoted to a
controller interrupt. If set, an interrupt is generated if CLRIS is set;
otherwise, an interrupt is not generated.
Internal Oscillator Fault Interrupt Mask
This bit specifies whether an internal oscillator fault detection is promoted
to a controller interrupt. If set, an interrupt is generated if IOFRIS is set;
otherwise, an interrupt is not generated.
Main Oscillator Fault Interrupt Mask
This bit specifies whether a main oscillator fault detection is promoted
to a controller interrupt. If set, an interrupt is generated if MOFRIS is set;
otherwise, an interrupt is not generated.
LDO Power Unregulated Interrupt Mask
This bit specifies whether an LDO unregulated power situation is
promoted to a controller interrupt. If set, an interrupt is generated if
LDORIS is set; otherwise, an interrupt is not generated.
Brown-Out Reset Interrupt Mask
This bit specifies whether a brown-out condition is promoted to a
controller interrupt. If set, an interrupt is generated if BORRIS is set;
otherwise, an interrupt is not generated.
RO
RO
23
0
7
0
PLLLIM
R/W
RO
22
0
6
0
CLIM
R/W
RO
21
0
5
0
IOFIM
R/W
RO
20
0
4
0
MOFIM
R/W
RO
19
0
3
0
LDOIM
R/W
RO
18
0
2
0
BORIM
R/W
RO
17
0
1
0
June 04, 2008
PLLFIM
R/W
RO
16
0
0
0

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