st10f272z2 STMicroelectronics, st10f272z2 Datasheet - Page 159

no-image

st10f272z2

Manufacturer Part Number
st10f272z2
Description
16-bit Mcu With 256 Kbyte Flash Memory And 20 Kbyte Ram
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
st10f272z2Q3
Manufacturer:
E-CMOS
Quantity:
10 000
Part Number:
st10f272z2Q3
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
st10f272z2T3
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
st10f272z2T3
Manufacturer:
ST
0
ST10F272Z2
Table 71.
25.8.9
0
0
0
0
(P0H.7-5)
P0.15-13
1
1
0
0
1
0
1
0
Internal PLL divider mechanism (continued)
The PLL input frequency range is limited to 1 to 3.5 MHz, while the VCO oscillation range is
64 to 128 MHz. The CPU clock frequency range when PLL is used is 16 to 64 MHz.
Example 1
Example 2
PLL Jitter
The following terminology is hereafter defined:
Jitter at the PLL output can be due to the following reasons:
4 to 12 MHz
4 to 6.4 MHz
1 to 64 MHz
Frequency
f
P0(15:13) = ‘110’ (multiplication by 3)
PLL input frequency = 2.5 MHz
VCO frequency = 120 MHz
PLL output frequency = 30 MHz
(VCO frequency divided by 4)
f
f
P0(15:13) = ‘100’ (Multiplication by 5)
PLL input frequency = 2 MHz
VCO frequency = 80 MHz
PLL output frequency = 40 MHz (VCO frequency divided by 2)
f
Self referred single period jitter
Also called “Period Jitter”, it can be defined as the difference of the T
where T
time period of the PLL output clock.
Self referred long term jitter
Also called “N period jitter”, it can be defined as the difference of T
T
minimum time difference between N+1 clock rising edges. Here N should be kept
sufficiently large to have the long term jitter. For N=1, this becomes the single period
jitter.
Jitter in the input clock
Noise in the PLL loop.
XTAL
CPU
XTAL
CPU
4 MHz
max
XTAL
= 30 MHz (no effect of output prescaler)
= 40 MHz (no effect of Output Prescaler)
is the maximum time difference between N+1 clock rising edges and T
= 10 MHz
= 8 MHz
max
1)
is maximum time period of the PLL output clock and T
Prescaler
F
F
XTAL
XTAL
Input
/ 2
/ 2
Multiply by
40
64
PLL bypassed
PLL bypassed
PLL
Divide by
2
2
Prescaler
F
Output
PLL
Electrical characteristics
/ 2
max
min
max
CPU Frequency
f
is the minimum
and T
CPU
F
F
and T
F
F
XTAL
XTAL
XTAL
= f
XTAL
min
min
XTAL
x 10
x 16
x 1
min
/ 2
, where
is the
159/189
x F
,

Related parts for st10f272z2